On Fri, 2021-11-19 at 06:09 -0800, José Roberto de Souza wrote:
> This workarounds are causing hangs, because I missed the fact that it
> needs to be enabled for all cases and disabled when doing a resolve
> pass.
>
> So KMD only needs to whitelist it and UMD will be the one setting it
> on per case.
>
> This reverts commit 28ec02c9cbebf3feeaf21a59df9dfbc02bda3362.
Missed a:
Fixes: 28ec02c9cbeb ("drm/i915: Implement Wa_1508744258")
So this can be propagated to older kernels, will add while applying.
>
> Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/4145
> Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index a9727447c0379..cd2935b9e7c81 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -637,13 +637,6 @@ static void gen12_ctx_workarounds_init(struct
> intel_engine_cs *engine,
> FF_MODE2_GS_TIMER_MASK,
> FF_MODE2_GS_TIMER_224,
> 0, false);
> -
> - /*
> - * Wa_14012131227:dg1
> - * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p
> - */
> - wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1,
> - GEN9_RHWO_OPTIMIZATION_DISABLE);
> }
>
> static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,
