[Intel-gfx] [PATCH 08/10] drm/i915: Use for_each_intel_crtc_in_pipe_mask() more

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Convert a few hand roller for_each_intel_crtc_in_pipe_mask()
to the real thing.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 9a7f40d17b79..6df498fc720a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4069,14 +4069,12 @@ static u8 enabled_bigjoiner_pipes(struct 
drm_i915_private *dev_priv)
        u8 master_pipes = 0, slave_pipes = 0;
        struct intel_crtc *crtc;
 
-       for_each_intel_crtc(&dev_priv->drm, crtc) {
+       for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc,
+                                        bigjoiner_pipes(dev_priv)) {
                enum intel_display_power_domain power_domain;
                enum pipe pipe = crtc->pipe;
                intel_wakeref_t wakeref;
 
-               if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
-                       continue;
-
                power_domain = intel_dsc_power_domain(crtc, (enum transcoder) 
pipe);
                with_intel_display_power_if_enabled(dev_priv, power_domain, 
wakeref) {
                        u32 tmp = intel_de_read(dev_priv, 
ICL_PIPE_DSS_CTL1(pipe));
@@ -8993,10 +8991,8 @@ static u32 intel_encoder_possible_crtcs(struct 
intel_encoder *encoder)
        struct intel_crtc *crtc;
        u32 possible_crtcs = 0;
 
-       for_each_intel_crtc(dev, crtc) {
-               if (encoder->pipe_mask & BIT(crtc->pipe))
-                       possible_crtcs |= drm_crtc_mask(&crtc->base);
-       }
+       for_each_intel_crtc_in_pipe_mask(dev, crtc, encoder->pipe_mask)
+               possible_crtcs |= drm_crtc_mask(&crtc->base);
 
        return possible_crtcs;
 }
-- 
2.34.1