[Intel-gfx] [PATCH] drm/i915: move intel_hws_csb_write_index() out of i915_drv.h

[Jani Nikula]

Underscore prefix the index macros, and place
INTEL_HWS_CSB_WRITE_INDEX() as a macro next to them, to declutter
i915_drv.h.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine.h               | 6 ++++--
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
 drivers/gpu/drm/i915/gvt/execlist.c                  | 2 +-
 drivers/gpu/drm/i915/i915_drv.h                      | 8 --------
 4 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h 
b/drivers/gpu/drm/i915/gt/intel_engine.h
index 0e353d8c2bc8..faf26ed37d01 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -180,8 +180,10 @@ intel_write_status_page(struct intel_engine_cs *engine, 
int reg, u32 value)
 #define I915_GEM_HWS_SCRATCH           0x80
 
 #define I915_HWS_CSB_BUF0_INDEX                0x10
-#define I915_HWS_CSB_WRITE_INDEX       0x1f
-#define ICL_HWS_CSB_WRITE_INDEX                0x2f
+#define _I915_HWS_CSB_WRITE_INDEX      0x1f
+#define _ICL_HWS_CSB_WRITE_INDEX               0x2f
+#define INTEL_HWS_CSB_WRITE_INDEX(__i915) \
+       (GRAPHICS_VER(__i915) >= 11 ? _ICL_HWS_CSB_WRITE_INDEX : 
_I915_HWS_CSB_WRITE_INDEX)
 
 void intel_engine_stop(struct intel_engine_cs *engine);
 void intel_engine_cleanup(struct intel_engine_cs *engine);
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c 
b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 9bb7c863172f..961d795220a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3503,7 +3503,7 @@ int intel_execlists_submission_setup(struct 
intel_engine_cs *engine)
                (u64 *)&engine->status_page.addr[I915_HWS_CSB_BUF0_INDEX];
 
        execlists->csb_write =
-               &engine->status_page.addr[intel_hws_csb_write_index(i915)];
+               &engine->status_page.addr[INTEL_HWS_CSB_WRITE_INDEX(i915)];
 
        if (GRAPHICS_VER(i915) < 11)
                execlists->csb_size = GEN8_CSB_ENTRIES;
diff --git a/drivers/gpu/drm/i915/gvt/execlist.c 
b/drivers/gpu/drm/i915/gvt/execlist.c
index c8dcda6d4f0d..66d354c4195b 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -163,7 +163,7 @@ static void emulate_csb_update(struct intel_vgpu_execlist 
*execlist,
                                               hwsp_gpa + 
I915_HWS_CSB_BUF0_INDEX * 4 + write_pointer * 8,
                                               status, 8);
                intel_gvt_hypervisor_write_gpa(vgpu,
-                                              hwsp_gpa + 
intel_hws_csb_write_index(execlist->engine->i915) * 4,
+                                              hwsp_gpa + 
INTEL_HWS_CSB_WRITE_INDEX(execlist->engine->i915) * 4,
                                               &write_pointer, 4);
        }
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8c1706fd81f9..05656cc738d1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1739,14 +1739,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
        return (struct intel_device_info *)INTEL_INFO(dev_priv);
 }
 
-static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
-{
-       if (GRAPHICS_VER(i915) >= 11)
-               return ICL_HWS_CSB_WRITE_INDEX;
-       else
-               return I915_HWS_CSB_WRITE_INDEX;
-}
-
 static inline enum i915_map_type
 i915_coherent_map_type(struct drm_i915_private *i915,
                       struct drm_i915_gem_object *obj, bool always_coherent)
-- 
2.30.2