On 10/02/2022 16:44, Anusha Srivatsa wrote:
DMC_DEBUGU3 changes from DG1+
Bspec: 49788
Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 ++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f4de004d470f..87fc4b9b7b93 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -474,8 +474,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
* reg for DC3CO debugging and validation,
* but TGL DMC f/w is using DMC_DEBUG3 reg for DC3CO counter.
*/
- seq_printf(m, "DC3CO count: %d\n",
- intel_de_read(dev_priv, DMC_DEBUG3));
+ if (IS_DGFX(dev_priv))
+ seq_printf(m, "DC3CO count: %d\n",
intel_de_read(dev_priv, DG1_DMC_DEBUG3));
+ else
+ seq_printf(m, "DC3CO count: %d\n",
intel_de_read(dev_priv, DMC_DEBUG3));
Nicer not to duplicate it all and use ternary:
seq_printf(m, "DC3CO count: %d\n",
intel_de_read(dev_priv,
IS_DGFX(dev_priv) ?
DG1_DMC_DEBUG3 : DMC_DEBUG3));
?
Regards,
Tvrtko
} else {
dc5_reg = IS_BROXTON(dev_priv) ? BXT_DMC_DC3_DC5_COUNT :
SKL_DMC_DC3_DC5_COUNT;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 87c92314ee26..802962e3977c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5633,6 +5633,7 @@
#define DG1_DMC_DEBUG_DC5_COUNT _MMIO(0x134154)
#define DMC_DEBUG3 _MMIO(0x101090)
+#define DG1_DMC_DEBUG3 _MMIO(0x13415C)
/* Display Internal Timeout Register */
#define RM_TIMEOUT _MMIO(0x42060)
