[Intel-gfx] [PATCH 4/6] drm/i915: Unconfuse pre-icl vs. icl+ intel_sagv_{pre, post}_plane_update()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

intel_sagv_{pre,post}_plane_update() can accidentally forget
to bail out early on pre-icl and proceed down the icl+ codepath
at the end of the function. Fortunately it'll bail out before
it gets too far due to old_qgv_mask==new_qgv_mask==0 so no real
bug here. But lets make the code less confusing anyway.

Cc: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d8eb553ffad3..068870b17c43 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3806,8 +3806,9 @@ void intel_sagv_pre_plane_update(struct 
intel_atomic_state *state)
        if (!new_bw_state)
                return;
 
-       if (DISPLAY_VER(dev_priv) < 11 && !intel_can_enable_sagv(dev_priv, 
new_bw_state)) {
-               intel_disable_sagv(dev_priv);
+       if (DISPLAY_VER(dev_priv) < 11) {
+               if (!intel_can_enable_sagv(dev_priv, new_bw_state))
+                       intel_disable_sagv(dev_priv);
                return;
        }
 
@@ -3857,8 +3858,9 @@ void intel_sagv_post_plane_update(struct 
intel_atomic_state *state)
        if (!new_bw_state)
                return;
 
-       if (DISPLAY_VER(dev_priv) < 11 && intel_can_enable_sagv(dev_priv, 
new_bw_state)) {
-               intel_enable_sagv(dev_priv);
+       if (DISPLAY_VER(dev_priv) < 11) {
+               if (intel_can_enable_sagv(dev_priv, new_bw_state))
+                       intel_enable_sagv(dev_priv);
                return;
        }
 
-- 
2.34.1