2013/10/24 Ben Widawsky <benjamin.widaw...@intel.com>: > Production IVB does not need it. I confirmed this with Art. > > Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 10 ---------- > 1 file changed, 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index d4dd543..33ad028 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -254,12 +254,6 @@ static void ironlake_disable_fbc(struct drm_device *dev) > dpfc_ctl &= ~DPFC_CTL_EN; > I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl); > > - if (IS_IVYBRIDGE(dev)) > - /* WaFbcDisableDpfcClockGating:ivb */ > - I915_WRITE(ILK_DSPCLK_GATE_D, > - I915_READ(ILK_DSPCLK_GATE_D) & > - ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE); > - > if (IS_HASWELL(dev)) > /* WaFbcDisableDpfcClockGating:hsw */ > I915_WRITE(HSW_CLKGATE_DISABLE_PART_1, > @@ -295,10 +289,6 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, > unsigned long interval) > if (IS_IVYBRIDGE(dev)) { > /* WaFbcAsynchFlipDisableFbcQueue:ivb */ > I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS); > - /* WaFbcDisableDpfcClockGating:ivb */ > - I915_WRITE(ILK_DSPCLK_GATE_D, > - I915_READ(ILK_DSPCLK_GATE_D) | > - ILK_DPFCUNIT_CLOCK_GATE_DISABLE); > } else { > /* WaFbcAsynchFlipDisableFbcQueue:hsw */ > I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe), > -- > 1.8.4.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx