The change is to be able to have access to the in-flight state.
Changing this one functions, trickles the change to
intel_cdclk_changed()
Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 22 ++++++++++---------
drivers/gpu/drm/i915/display/intel_cdclk.h | 3 ++-
.../drm/i915/display/intel_display_power.c | 2 +-
3 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 840d611197cf..2278b052d859 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2003,7 +2003,8 @@ static bool intel_cdclk_squash(struct drm_i915_private
*dev_priv,
* True if changing between the two CDCLK configurations
* requires all pipes to be off, false if not.
*/
-bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
+bool intel_cdclk_needs_modeset(struct drm_i915_private *i915,
+ const struct intel_cdclk_config *a,
const struct intel_cdclk_config *b)
{
return a->cdclk != b->cdclk ||
@@ -2053,10 +2054,11 @@ static bool intel_cdclk_can_cd2x_update(struct
drm_i915_private *dev_priv,
* Returns:
* True if the CDCLK configurations don't match, false if they do.
*/
-static bool intel_cdclk_changed(const struct intel_cdclk_config *a,
+static bool intel_cdclk_changed(struct drm_i915_private *i915,
+ const struct intel_cdclk_config *a,
const struct intel_cdclk_config *b)
{
- return intel_cdclk_needs_modeset(a, b) ||
+ return intel_cdclk_needs_modeset(i915, a, b) ||
a->voltage_level != b->voltage_level;
}
@@ -2085,7 +2087,7 @@ static void intel_set_cdclk(struct drm_i915_private
*dev_priv,
{
struct intel_encoder *encoder;
- if (!intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_config))
+ if (!intel_cdclk_changed(dev_priv, &dev_priv->cdclk.hw, cdclk_config))
return;
if (drm_WARN_ON_ONCE(&dev_priv->drm, !dev_priv->cdclk_funcs->set_cdclk))
@@ -2132,7 +2134,7 @@ static void intel_set_cdclk(struct drm_i915_private
*dev_priv,
intel_audio_cdclk_change_post(dev_priv);
if (drm_WARN(&dev_priv->drm,
- intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_config),
+ intel_cdclk_changed(dev_priv, &dev_priv->cdclk.hw,
cdclk_config),
"cdclk state doesn't match!\n")) {
intel_cdclk_dump_config(dev_priv, &dev_priv->cdclk.hw, "[hw
state]");
intel_cdclk_dump_config(dev_priv, cdclk_config, "[sw state]");
@@ -2156,7 +2158,7 @@ intel_set_cdclk_pre_plane_update(struct
intel_atomic_state *state)
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
- if (!intel_cdclk_changed(&old_cdclk_state->actual,
+ if (!intel_cdclk_changed(dev_priv, &old_cdclk_state->actual,
&new_cdclk_state->actual))
return;
@@ -2185,7 +2187,7 @@ intel_set_cdclk_post_plane_update(struct
intel_atomic_state *state)
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
- if (!intel_cdclk_changed(&old_cdclk_state->actual,
+ if (!intel_cdclk_changed(dev_priv, &old_cdclk_state->actual,
&new_cdclk_state->actual))
return;
@@ -2739,7 +2741,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state
*state)
if (ret)
return ret;
- if (intel_cdclk_changed(&old_cdclk_state->actual,
+ if (intel_cdclk_changed(dev_priv, &old_cdclk_state->actual,
&new_cdclk_state->actual)) {
/*
* Also serialize commits across all crtcs
@@ -2750,7 +2752,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state
*state)
return ret;
} else if (old_cdclk_state->active_pipes !=
new_cdclk_state->active_pipes ||
old_cdclk_state->force_min_cdclk !=
new_cdclk_state->force_min_cdclk ||
- intel_cdclk_changed(&old_cdclk_state->logical,
+ intel_cdclk_changed(dev_priv, &old_cdclk_state->logical,
&new_cdclk_state->logical)) {
ret = intel_atomic_lock_global_state(&new_cdclk_state->base);
if (ret)
@@ -2793,7 +2795,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state
*state)
drm_dbg_kms(&dev_priv->drm,
"Can change cdclk cd2x divider with pipe %c
active\n",
pipe_name(pipe));
- } else if (intel_cdclk_needs_modeset(&old_cdclk_state->actual,
+ } else if (intel_cdclk_needs_modeset(dev_priv, &old_cdclk_state->actual,
&new_cdclk_state->actual)) {
/* All pipes must be switched off while we change the cdclk. */
ret = intel_modeset_all_pipes(state);
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 06d7f9f0b253..ed1749e094fc 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -71,7 +71,8 @@ void intel_init_cdclk_hooks(struct drm_i915_private
*dev_priv);
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);
u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
-bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
+bool intel_cdclk_needs_modeset(struct drm_i915_private *i915,
+ const struct intel_cdclk_config *a,
const struct intel_cdclk_config *b);
void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 3dc859032bac..417a56d54056 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1118,7 +1118,7 @@ static void gen9_disable_dc_states(struct
drm_i915_private *dev_priv)
intel_cdclk_get_cdclk(dev_priv, &cdclk_config);
/* Can't read out voltage_level so can't use intel_cdclk_changed() */
drm_WARN_ON(&dev_priv->drm,
- intel_cdclk_needs_modeset(&dev_priv->cdclk.hw,
+ intel_cdclk_needs_modeset(dev_priv, &dev_priv->cdclk.hw,
&cdclk_config));
gen9_assert_dbuf_enabled(dev_priv);
--
2.25.1
