On Wed, 30 Mar 2022, Ville Syrjälä <ville.syrj...@linux.intel.com> wrote:
> On Wed, Mar 30, 2022 at 12:30:19PM +0300, Jani Nikula wrote:
>> Debug log when DSC is going to be used, and why, instead of
>> unconditionally logging the rarely used debug option setting, which
>> might not have any bearing on whether DSC is going to be used or not.
>> 
>> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++++++-------
>>  1 file changed, 12 insertions(+), 7 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index c7f8fc654857..56c36c9ef173 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1483,6 +1483,7 @@ intel_dp_compute_link_config(struct intel_encoder 
>> *encoder,
>>              &pipe_config->hw.adjusted_mode;
>>      struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>      struct link_config_limits limits;
>> +    bool joiner_needs_dsc = false;
>>      int ret;
>>  
>>      limits.min_rate = intel_dp_common_rate(intel_dp, 0);
>> @@ -1518,19 +1519,23 @@ intel_dp_compute_link_config(struct intel_encoder 
>> *encoder,
>>                                  adjusted_mode->crtc_clock))
>>              pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, 
>> crtc->pipe);
>>  
>> +    /*
>> +     * Pipe joiner needs compression up to display 12 due to bandwidth
>> +     * limitation. DG2 onwards pipe joiner can be enabled without
>> +     * compression.
>> +     */
>> +    joiner_needs_dsc = DISPLAY_VER(i915) < 13 && 
>> pipe_config->bigjoiner_pipes;
>
> Could be a function to reduce the pollution.
>
> Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>

Thanks, pushed to din.

>
> PS. The excessive debugs from intel_dp_dsc_get_output_bpp() are
> also annoying. Would be nice if someone could do something about
> that.

Huh, I thought I'd already done something about that. Or maybe I just
complained about that.

BR,
Jani.

>
>> +
>>      /*
>>       * Optimize for slow and wide for everything, because there are some
>>       * eDP 1.3 and 1.4 panels don't work well with fast and narrow.
>>       */
>>      ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
>>  
>> -    /*
>> -     * Pipe joiner needs compression upto display12 due to BW limitation. 
>> DG2
>> -     * onwards pipe joiner can be enabled without compression.
>> -     */
>> -    drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
>> -    if (ret || intel_dp->force_dsc_en ||
>> -        (DISPLAY_VER(i915) < 13 && pipe_config->bigjoiner_pipes)) {
>> +    if (ret || joiner_needs_dsc || intel_dp->force_dsc_en) {
>> +            drm_dbg_kms(&i915->drm, "Try DSC (fallback=%s, joiner=%s, 
>> force=%s)\n",
>> +                        str_yes_no(ret), str_yes_no(joiner_needs_dsc),
>> +                        str_yes_no(intel_dp->force_dsc_en));
>>              ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
>>                                                conn_state, &limits);
>>              if (ret < 0)
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center

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