This is another drm-intel-collector updated notice:
http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=drm-intel-collector

Here goes the update list in order for better reviewers assignment:

Patch     drm/i915: Asynchronously perform the set-base for a simple modeset - 
Reviewed
Patch     drm/i915: Initialise min/max frequencies before updating RPS 
registers - Reviewer: Ville Syrjälä <ville.syrj...@linux.intel.com>
Patch     drm/i915: Fix gen3/4 vblank counter wraparound - Reviewer:
Patch     drm/i915: Use frame counter for intel_wait_for_vblank() on CTG - 
Reviewer:
Patch     drm/i915: Require HW contexts (when possible) - Reviewer:

Overall Process:

drm-intel-collector - review request
 1. Daniel pushs drm-intel-testing (every 2 weeks)
 2. I rebase drm-intel-collector onto drm-intel-testing
 3. Add Reviewer: tag with voluntered reviewers. If you don't believe you 
should be assigned on a particular patch please don't get mad just tell you 
wont review or volunteer someone else.
 4. I resubmit remaining patches for review without picking any new 
(drm-intel-collector - review request)

drm-intel-collector - updated
 5. One week later I collect all simple (1-2) patches that wasn't yet reviewed 
and not queued by Daniel from one testing update until another.
 6. Request automated QA's PRTS automated i-g-t tests comparing 
drm-intel-testing x drm-intel-collector
 7. If tests are ok I send the update notification or the patches as a series 
to intel-gfx mailing list for better tracking and to be reviewed. 
(drm-intel-collector - updated)
 8. Let me know volunteers for review new patches and also let me know if I've 
picked any patch that I shouldn't.

There are some reasons that some patches can be left behind:
1. Your patch didn't applied cleanly and I couldn't easily solve the conflicts.
2. Kernel didn't compiled with your patch.
3. I simply missed it. If you believe this is the case please warn me.

Please help me to get these patches reviewed and queued by Daniel.

Also, please let me know if you have further ideas how to improve this process.

Thanks in advance,
Rodrigo.


Ben Widawsky (1):
  drm/i915: Require HW contexts (when possible)

Chris Wilson (2):
  drm/i915: Asynchronously perform the set-base for a simple modeset
  drm/i915: Initialise min/max frequencies before updating RPS registers

Ville Syrjälä (2):
  drm/i915: Fix gen3/4 vblank counter wraparound
  drm/i915: Use frame counter for intel_wait_for_vblank() on CTG

 drivers/gpu/drm/i915/i915_debugfs.c     |  2 +-
 drivers/gpu/drm/i915/i915_drv.c         |  3 ---
 drivers/gpu/drm/i915/i915_drv.h         |  3 +--
 drivers/gpu/drm/i915/i915_gem.c         |  8 +++++-
 drivers/gpu/drm/i915/i915_gem_context.c | 43 +++++++++++++++------------------
 drivers/gpu/drm/i915/i915_irq.c         |  2 +-
 drivers/gpu/drm/i915/i915_sysfs.c       | 22 ++++++++---------
 drivers/gpu/drm/i915/intel_display.c    | 19 +++++++++------
 drivers/gpu/drm/i915/intel_pm.c         | 19 ++++-----------
 9 files changed, 57 insertions(+), 64 deletions(-)

-- 
1.8.3.1

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