No need to have this parameter in intel_device_info struct
as this feature was only supported by display 9, display 11, tigerlake
and DG1, no newer platform will have this feature.
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++++--
drivers/gpu/drm/i915/i915_pci.c | 5 -----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
3 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d8fa1d09cc828..d866287c663a2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1304,8 +1304,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DP_MST(dev_priv) (HAS_DDI(dev_priv))
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv)
(INTEL_INFO(dev_priv)->display.has_fpga_dbg)
#define HAS_PSR(dev_priv) (DISPLAY_VER(dev_priv) >= 9)
-#define HAS_PSR_HW_TRACKING(dev_priv) \
- (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
+#define HAS_PSR_HW_TRACKING(dev_priv) ((DISPLAY_VER(dev_priv) >= 9 && \
+ DISPLAY_VER(dev_priv) <= 11) || \
+ IS_TIGERLAKE(dev_priv) || \
+ IS_DG1(dev_priv))
#define HAS_PSR2_SEL_FETCH(dev_priv) (DISPLAY_VER(dev_priv) >= 12)
#define HAS_TRANSCODER(dev_priv, trans)
((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 098d47cc47b44..c6e99305e24d0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -631,7 +631,6 @@ static const struct intel_device_info chv_info = {
GEN9_DEFAULT_PAGE_SIZES, \
.display.has_dmc = 1, \
.display.has_hdcp = 1, \
- .display.has_psr_hw_tracking = 1, \
.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
.dbuf.slice_mask = BIT(DBUF_S1)
@@ -679,7 +678,6 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_fpga_dbg = 1, \
.display.fbc_mask = BIT(INTEL_FBC_A), \
.display.has_hdcp = 1, \
- .display.has_psr_hw_tracking = 1, \
.has_runtime_pm = 1, \
.display.has_dmc = 1, \
.has_rps = true, \
@@ -865,7 +863,6 @@ static const struct intel_device_info rkl_info = {
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C),
.display.has_hti = 1,
- .display.has_psr_hw_tracking = 0,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
};
@@ -897,7 +894,6 @@ static const struct intel_device_info adl_s_info = {
PLATFORM(INTEL_ALDERLAKE_S),
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) |
BIT(PIPE_D),
.display.has_hti = 1,
- .display.has_psr_hw_tracking = 0,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
.dma_mask_size = 39,
@@ -955,7 +951,6 @@ static const struct intel_device_info adl_p_info = {
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
.display.has_cdclk_crawl = 1,
.display.has_modular_fia = 1,
- .display.has_psr_hw_tracking = 0,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
.ppgtt_size = 48,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 5c17257f3f44b..bea9f92e2264c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -174,7 +174,6 @@ enum intel_ppgtt_type {
func(has_hti); \
func(has_modular_fia); \
func(has_overlay); \
- func(has_psr_hw_tracking); \
func(overlay_needs_physical); \
func(supports_tv);
--
2.36.0
