On Thu, Jun 02, 2022 at 01:17:30PM -0700, José Roberto de Souza wrote:
> This workaround brings some regressions to DG2 and if really necessary
> for DG2 an alternative workaround will be implemented.
>
> BSpec: 54077
> Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index bbdc34a23d548..8b807284cde1f 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -813,8 +813,8 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)
>
> static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
> {
> - /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,dg2,adlp */
> - if (DISPLAY_VER(fbc->i915) >= 11)
> + /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp */
> + if (DISPLAY_VER(fbc->i915) >= 11 && !IS_DG2(fbc->i915))
> intel_de_rmw(fbc->i915, ILK_DPFC_CHICKEN(fbc->id), 0,
> DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
> }
> --
> 2.36.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
