The i915 KMD will use the first async flip to update the watermarks as
per the watermark optimization in DISPLAY13. Hence the actual async flip
will happen from the subsequent flips.
For alternate sync async test, a dummy async flip has to be done to
allow the KMD to perform the watermark related updates before writing to
the surface base address.
Signed-off-by: Arun R Murthy <arun.r.mur...@intel.com>
---
tests/kms_async_flips.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c
index 1701883b..b9e67454 100644
--- a/tests/kms_async_flips.c
+++ b/tests/kms_async_flips.c
@@ -189,19 +189,20 @@ static void test_async_flip(data_t *data, bool
alternate_sync_async)
* In older platforms (<= Gen10), async address update
bit is double buffered.
* So flip timestamp can be verified only from the
second flip.
* The first async flip just enables the async address
update.
+ * In platforms greater than DISPLAY13 thr first async
flip will be discarded
+ * in order to change the watermark levels as per the
optimization. Hence the
+ * subsequent async flips will actually do the
asynchronous flips.
*/
if (is_i915_device(data->drm_fd)) {
uint32_t devid =
intel_get_drm_devid(data->drm_fd);
- if (IS_GEN9(devid) || IS_GEN10(devid)) {
- ret = drmModePageFlip(data->drm_fd,
data->crtc_id,
- data->bufs[frame
% 4].fb_id,
- flags, data);
+ ret = drmModePageFlip(data->drm_fd,
data->crtc_id,
+ data->bufs[frame %
4].fb_id,
+ flags, data);
- igt_assert(ret == 0);
+ igt_assert(ret == 0);
- wait_flip_event(data);
- }
+ wait_flip_event(data);
}
}
--
2.25.1
