On 7/28/2022 4:07 PM, john.c.harri...@intel.com wrote:
From: John Harrison <john.c.harri...@intel.com>
New release of GuC with a bunch of fixes specific to DG2. Some of
these require follow up i915 changes to enable.
This needs a note to explain that we don't need to maintain 70.1
compatibility because DG2 is still under force_probe. Don't need to
re-send, just add it on when merging.
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Daniele
Signed-off-by: John Harrison <john.c.harri...@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index d5fca1f68eff2..58547292efa0a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -53,7 +53,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* firmware as TGL.
*/
#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
- fw_def(DG2, 0, guc_def(dg2, 70, 1, 2)) \
+ fw_def(DG2, 0, guc_def(dg2, 70, 4, 1)) \
fw_def(ALDERLAKE_P, 0, guc_def(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_S, 0, guc_def(tgl, 70, 1, 1)) \
fw_def(DG1, 0, guc_def(dg1, 70, 1, 1)) \
