[Intel-gfx] [PATCH 18/19] drm/i915/guc: Support OA when Wa_16011777198 is enabled

[Umesh Nerlige Ramappa]

From: Vinay Belgaumkar <vinay.belgaum...@intel.com>

There is a w/a to reset RCS/CCS before it goes into RC6. This breaks
OA. Fix it by disabling RC6.

Signed-off-by: Vinay Belgaumkar <vinay.belgaum...@intel.com>
---
 .../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h |  9 ++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   | 45 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h   |  2 +
 drivers/gpu/drm/i915/i915_perf.c              | 29 ++++++++++++
 4 files changed, 85 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
index 4c840a2639dc..811add10c30d 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
@@ -128,6 +128,15 @@ enum slpc_media_ratio_mode {
        SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO = 2,
 };
 
+enum slpc_gucrc_mode {
+       SLPC_GUCRC_MODE_HW = 0,
+       SLPC_GUCRC_MODE_GUCRC_NO_RC6 = 1,
+       SLPC_GUCRC_MODE_GUCRC_STATIC_TIMEOUT = 2,
+       SLPC_GUCRC_MODE_GUCRC_DYNAMIC_HYSTERESIS = 3,
+
+       SLPC_GUCRC_MODE_MAX,
+};
+
 enum slpc_event_id {
        SLPC_EVENT_RESET = 0,
        SLPC_EVENT_SHUTDOWN = 1,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index e1fa1f32f29e..23989f5452a7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -642,6 +642,51 @@ static void slpc_get_rp_values(struct intel_guc_slpc *slpc)
                slpc->boost_freq = slpc->rp0_freq;
 }
 
+/**
+ * intel_guc_slpc_override_gucrc_mode() - override GUCRC mode
+ * @slpc: pointer to intel_guc_slpc.
+ * @mode: new value of the mode.
+ *
+ * This function will override the GUCRC mode.
+ *
+ * Return: 0 on success, non-zero error code on failure.
+ */
+int intel_guc_slpc_override_gucrc_mode(struct intel_guc_slpc *slpc, u32 mode)
+{
+       int ret;
+       struct drm_i915_private *i915 = slpc_to_i915(slpc);
+       intel_wakeref_t wakeref;
+
+       if (mode >= SLPC_GUCRC_MODE_MAX)
+               return -EINVAL;
+
+       wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+       ret = slpc_set_param(slpc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
+       if (ret)
+               drm_err(&i915->drm,
+                       "Override gucrc mode %d failed %d\n",
+                       mode, ret);
+
+       intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+
+       return ret;
+}
+
+int intel_guc_slpc_unset_gucrc_mode(struct intel_guc_slpc *slpc)
+{
+       struct drm_i915_private *i915 = slpc_to_i915(slpc);
+       int ret = 0;
+
+       ret = slpc_unset_param(slpc, SLPC_PARAM_PWRGATE_RC_MODE);
+       if (ret)
+               drm_err(&i915->drm,
+                       "Unsetting gucrc mode failed %d\n",
+                       ret);
+
+       return ret;
+}
+
 /*
  * intel_guc_slpc_enable() - Start SLPC
  * @slpc: pointer to intel_guc_slpc.
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
index 82a98f78f96c..ccf483730d9d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
@@ -42,5 +42,7 @@ int intel_guc_slpc_set_media_ratio_mode(struct intel_guc_slpc 
*slpc, u32 val);
 void intel_guc_pm_intrmsk_enable(struct intel_gt *gt);
 void intel_guc_slpc_boost(struct intel_guc_slpc *slpc);
 void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc);
+int intel_guc_slpc_unset_gucrc_mode(struct intel_guc_slpc *slpc);
+int intel_guc_slpc_override_gucrc_mode(struct intel_guc_slpc *slpc, u32 mode);
 
 #endif
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 00371b4146d7..ad69c9674e80 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -208,6 +208,7 @@
 #include "gt/intel_lrc.h"
 #include "gt/intel_lrc_reg.h"
 #include "gt/intel_ring.h"
+#include "gt/uc/intel_guc_slpc.h"
 
 #include "i915_drv.h"
 #include "i915_file_private.h"
@@ -1660,6 +1661,16 @@ static void i915_oa_stream_destroy(struct 
i915_perf_stream *stream)
 
        free_oa_buffer(stream);
 
+       /*
+        * Wa_16011777198:dg2: Unset the override of GUCRC mode to enable rc6.
+        */
+       if (intel_guc_slpc_is_used(&gt->uc.guc) &&
+           intel_uc_uses_guc_rc(&gt->uc) &&
+           (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
+            IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0)))
+               drm_WARN_ON(&gt->i915->drm,
+                           intel_guc_slpc_unset_gucrc_mode(&gt->uc.guc.slpc));
+
        intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
        intel_engine_pm_put(stream->engine);
 
@@ -3348,6 +3359,24 @@ static int i915_oa_stream_init(struct i915_perf_stream 
*stream,
        intel_engine_pm_get(stream->engine);
        intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
 
+       /*
+        * Wa_16011777198:dg2: GuC resets render as part of the Wa. This causes
+        * OA to lose the configuration state. Prevent this by overriding GUCRC
+        * mode.
+        */
+       if (intel_guc_slpc_is_used(&gt->uc.guc) &&
+           intel_uc_uses_guc_rc(&gt->uc) &&
+           (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
+            IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))) {
+               ret = intel_guc_slpc_override_gucrc_mode(&gt->uc.guc.slpc,
+                                                        
SLPC_GUCRC_MODE_GUCRC_NO_RC6);
+               if (ret) {
+                       drm_dbg(&stream->perf->i915->drm,
+                               "Unable to override gucrc mode\n");
+                       goto err_config;
+               }
+       }
+
        ret = alloc_oa_buffer(stream);
        if (ret)
                goto err_oa_buf_alloc;
-- 
2.25.1