On Mon, 10 Oct 2022, Animesh Manna <animesh.ma...@intel.com> wrote:
> Simplified pps_get_register() which use get_pps_idx() hook to derive the
> pps instance and get_pps_idx() will be initialized at pps_init().
>
> v1: Initial version. Got r-b from Jani.
>
> Cc: Jani Nikula <jani.nik...@intel.com>
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Cc: Uma Shankar <uma.shan...@intel.com>
> Signed-off-by: Animesh Manna <animesh.ma...@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_pps.c          | 15 ++++++++++-----
>  2 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e2b853e9e51d..44ab296c1f04 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1694,6 +1694,7 @@ struct intel_dp {
>       u8 (*preemph_max)(struct intel_dp *intel_dp);
>       u8 (*voltage_max)(struct intel_dp *intel_dp,
>                         const struct intel_crtc_state *crtc_state);
> +     int (*get_pps_idx)(struct intel_dp *intel_dp);
>  
>       /* Displayport compliance testing */
>       struct intel_dp_compliance compliance;
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index 21944f5bf3a8..b972fa6ec00d 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -364,12 +364,10 @@ static void intel_pps_get_registers(struct intel_dp 
> *intel_dp,
>       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>       int pps_idx = 0;
>  
> -     memset(regs, 0, sizeof(*regs));
> +     if (intel_dp->get_pps_idx)
> +             pps_idx = intel_dp->get_pps_idx(intel_dp);
>  
> -     if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> -             pps_idx = bxt_power_sequencer_idx(intel_dp);
> -     else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> -             pps_idx = vlv_power_sequencer_pipe(intel_dp);
> +     memset(regs, 0, sizeof(*regs));

It's benign and I've approved this already, but since I keep having to
look at the patch over and over, it has really started bugging me that
the memset() and ->get_pps_idx() calls change their order for no obvious
reason. When you do refactoring, just don't do accidental functional
changes at the same time.

BR,
Jani.


>  
>       regs->pp_ctrl = PP_CONTROL(pps_idx);
>       regs->pp_stat = PP_STATUS(pps_idx);
> @@ -1432,6 +1430,13 @@ void intel_pps_init(struct intel_dp *intel_dp)
>       intel_dp->pps.initializing = true;
>       INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
>  
> +     if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +             intel_dp->get_pps_idx = bxt_power_sequencer_idx;
> +     else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> +             intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
> +     else
> +             intel_dp->get_pps_idx = NULL;
> +
>       pps_init_timestamps(intel_dp);
>  
>       with_intel_pps_lock(intel_dp, wakeref) {

-- 
Jani Nikula, Intel Open Source Graphics Center

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