Add support for the PAL-60 mode. Because there is no separate TV mode property value for PAL-60, this requires matching the settings based on the modeline in addition to just that property alone.
Signed-off-by: Mateusz Kwiatkowski <kfyatek+public...@gmail.com> --- This patch depends on patch '[PATCH v5 21/22] drm/vc4: vec: Add support for more analog TV standards' submitted by Maxime Ripard (https://lore.kernel.org/dri-devel/20220728-rpi-analog-tv-properties-v5-21-d841cc64f...@cerno.tech/). To Maxime: if you decide to post v6, feel free to include this in your patchset instead if you want. --- drivers/gpu/drm/vc4/vc4_vec.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c index 88b4330bfa39..bbc41e502cc3 100644 --- a/drivers/gpu/drm/vc4/vc4_vec.c +++ b/drivers/gpu/drm/vc4/vc4_vec.c @@ -235,6 +235,7 @@ enum vc4_vec_tv_mode_id { struct vc4_vec_tv_mode { unsigned int mode; + u16 expected_htotal; u32 config0; u32 config1; u32 custom_freq; @@ -270,37 +271,52 @@ static const struct debugfs_reg32 vec_regs[] = { static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { { .mode = DRM_MODE_TV_MODE_NTSC, + .expected_htotal = 858, .config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN, .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, { .mode = DRM_MODE_TV_MODE_NTSC_443, + .expected_htotal = 858, .config0 = VEC_CONFIG0_NTSC_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ, .custom_freq = 0x2a098acb, }, { .mode = DRM_MODE_TV_MODE_NTSC_J, + .expected_htotal = 858, .config0 = VEC_CONFIG0_NTSC_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, { .mode = DRM_MODE_TV_MODE_PAL, + .expected_htotal = 864, .config0 = VEC_CONFIG0_PAL_BDGHI_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, + { + /* PAL-60 */ + .mode = DRM_MODE_TV_MODE_PAL, + .expected_htotal = 858, + .config0 = VEC_CONFIG0_PAL_M_STD, + .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ, + .custom_freq = 0x2a098acb, + }, { .mode = DRM_MODE_TV_MODE_PAL_M, + .expected_htotal = 858, .config0 = VEC_CONFIG0_PAL_M_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, { .mode = DRM_MODE_TV_MODE_PAL_N, + .expected_htotal = 864, .config0 = VEC_CONFIG0_PAL_N_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, { .mode = DRM_MODE_TV_MODE_SECAM, + .expected_htotal = 864, .config0 = VEC_CONFIG0_SECAM_STD, .config1 = VEC_CONFIG1_C_CVBS_CVBS, .custom_freq = 0x29c71c72, @@ -308,14 +324,15 @@ static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { }; static inline const struct vc4_vec_tv_mode * -vc4_vec_tv_mode_lookup(unsigned int mode) +vc4_vec_tv_mode_lookup(unsigned int mode, u16 htotal) { unsigned int i; for (i = 0; i < ARRAY_SIZE(vc4_vec_tv_modes); i++) { const struct vc4_vec_tv_mode *tv_mode = &vc4_vec_tv_modes[i]; - if (tv_mode->mode == mode) + if (tv_mode->mode == mode && + tv_mode->expected_htotal == htotal) return tv_mode; } @@ -394,6 +411,7 @@ vc4_vec_connector_set_property(struct drm_connector *connector, break; case VC4_VEC_TV_MODE_PAL: + case VC4_VEC_TV_MODE_PAL_60: state->tv.mode = DRM_MODE_TV_MODE_PAL; break; @@ -551,13 +569,16 @@ static void vc4_vec_encoder_enable(struct drm_encoder *encoder, struct drm_connector *connector = &vec->connector; struct drm_connector_state *conn_state = drm_atomic_get_new_connector_state(state, connector); + struct drm_display_mode *adjusted_mode = + &encoder->crtc->state->adjusted_mode; const struct vc4_vec_tv_mode *tv_mode; int idx, ret; if (!drm_dev_enter(drm, &idx)) return; - tv_mode = vc4_vec_tv_mode_lookup(conn_state->tv.mode); + tv_mode = vc4_vec_tv_mode_lookup(conn_state->tv.mode, + adjusted_mode->htotal); if (!tv_mode) goto err_dev_exit; base-commit: e16415e3ddae9abb14a00793554a162403f9af6d -- 2.34.1
