Move display hti/hdport related members under drm_i915_private display
sub-struct.

Prefer adding anonymous sub-structs even for single members that aren't
our own structs.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_core.h | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_hti.c          | 10 +++++-----
 drivers/gpu/drm/i915/i915_drv.h                   |  8 --------
 3 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h 
b/drivers/gpu/drm/i915/display/intel_display_core.h
index 337d8e08ba43..d851d401211f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -370,6 +370,16 @@ struct intel_display {
                struct mutex comp_mutex;
        } hdcp;
 
+       struct {
+               /*
+                * HTI (aka HDPORT) state read during initial hw readout. Most
+                * platforms don't have HTI, so this will just stay 0. Those
+                * that do will use this later to figure out which PLLs and PHYs
+                * are unavailable for driver usage.
+                */
+               u32 state;
+       } hti;
+
        struct {
                struct i915_power_domains domains;
 
diff --git a/drivers/gpu/drm/i915/display/intel_hti.c 
b/drivers/gpu/drm/i915/display/intel_hti.c
index e2b09e96f9a9..7d48f5646274 100644
--- a/drivers/gpu/drm/i915/display/intel_hti.c
+++ b/drivers/gpu/drm/i915/display/intel_hti.c
@@ -16,24 +16,24 @@ void intel_hti_init(struct drm_i915_private *i915)
         * any display resources before we create our display outputs.
         */
        if (INTEL_INFO(i915)->display.has_hti)
-               i915->hti_state = intel_de_read(i915, HDPORT_STATE);
+               i915->display.hti.state = intel_de_read(i915, HDPORT_STATE);
 }
 
 bool intel_hti_uses_phy(struct drm_i915_private *i915, enum phy phy)
 {
-       return i915->hti_state & HDPORT_ENABLED &&
-               i915->hti_state & HDPORT_DDI_USED(phy);
+       return i915->display.hti.state & HDPORT_ENABLED &&
+               i915->display.hti.state & HDPORT_DDI_USED(phy);
 }
 
 u32 intel_hti_dpll_mask(struct drm_i915_private *i915)
 {
-       if (!(i915->hti_state & HDPORT_ENABLED))
+       if (!(i915->display.hti.state & HDPORT_ENABLED))
                return 0;
 
        /*
         * Note: This is subtle. The values must coincide with what's defined
         * for the platform.
         */
-       return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->hti_state);
+       return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->display.hti.state);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 05b3300cc4ed..bb88aee2af25 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -300,14 +300,6 @@ struct drm_i915_private {
 
        struct intel_l3_parity l3_parity;
 
-       /*
-        * HTI (aka HDPORT) state read during initial hw readout.  Most
-        * platforms don't have HTI, so this will just stay 0.  Those that do
-        * will use this later to figure out which PLLs and PHYs are unavailable
-        * for driver usage.
-        */
-       u32 hti_state;
-
        /*
         * edram size in MB.
         * Cannot be determined by PCIID. You must always read a register.
-- 
2.34.1

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