On Wed, Apr 12, 2023 at 03:49:22PM -0700, Radhakrishna Sripada wrote:
> [...]
> +static void mtl_disable_ddi_buf(struct intel_encoder *encoder,
> +                             const struct intel_crtc_state *crtc_state)
> +{
> +     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +     enum port port = encoder->port;
> +     u32 val;
> +
> +     /* 3.b Clear DDI_CTL_DE Enable to 0. */
> +     val = intel_de_read(dev_priv, DDI_BUF_CTL(port));
> +     if (val & DDI_BUF_CTL_ENABLE) {
> +             val &= ~DDI_BUF_CTL_ENABLE;
> +             intel_de_write(dev_priv, DDI_BUF_CTL(port), val);
> +
> +             /* 3.c Poll for PORT_BUF_CTL Idle Status == 1, timeout after 
> 100us */
> +             mtl_wait_ddi_buf_idle(dev_priv, port);
> +     }
> +
> +     /* 3.d Disable D2D Link */
> +     mtl_ddi_disable_d2d_link(encoder);
> +
> +     /* 3.e Disable DP_TP_CTL */
> +     if (intel_crtc_has_dp_encoder(crtc_state)) {
> +             val = intel_de_read(dev_priv, dp_tp_ctl_reg(encoder, 
> crtc_state));
> +             val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);

Only DP_TP_CTL_ENABLE should be cleared and could use intel_de_rmw().

> +             intel_de_write(dev_priv, dp_tp_ctl_reg(encoder, crtc_state), 
> val);
> +     }
> +}

Reply via email to