[Intel-gfx] [PATCH v3 1/2] drm/i915/mtl: Add MTL performance tuning changes

[Radhakrishna Sripada]

MTL reuses the tuning parameters for DG2. Extend the dg2
performance tuning parameters to MTL.

v2: Add DRAW_WATERMARK tuning parameter.
v3: Limit DRAW_WATERMARK tuning to non A0 step.

Bspec: 68331
Cc: Haridhar Kalvala <haridhar.kalv...@intel.com>
Cc: Matt Roper <matthew.d.ro...@intel.com>
Cc: Gustavo Sousa <gustavo.so...@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.srip...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 786349e95487..2172f8d85421 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -817,6 +817,12 @@ static void mtl_ctx_workarounds_init(struct 
intel_engine_cs *engine,
 {
        struct drm_i915_private *i915 = engine->i915;
 
+       dg2_ctx_gt_tuning_init(engine, wal);
+
+       if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_B0, STEP_FOREVER) ||
+           IS_MTL_GRAPHICS_STEP(i915, P, STEP_B0, STEP_FOREVER))
+               wa_add(wal, DRAW_WATERMARK, VERT_WM_VAL, 0x3FF, 0, false);
+
        if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_A0, STEP_B0) ||
            IS_MTL_GRAPHICS_STEP(i915, P, STEP_A0, STEP_B0)) {
                /* Wa_14014947963 */
@@ -1754,7 +1760,7 @@ static void gt_tuning_settings(struct intel_gt *gt, 
struct i915_wa_list *wal)
                wa_mcr_masked_en(wal, XEHPC_LNCFMISCCFGREG0, XEHPC_HOSTCACHEEN);
        }
 
-       if (IS_DG2(gt->i915)) {
+       if (IS_DG2(gt->i915) || IS_METEORLAKE(gt->i915)) {
                wa_mcr_write_or(wal, XEHP_L3SCQREG7, 
BLEND_FILL_CACHING_OPT_DIS);
                wa_mcr_write_or(wal, XEHP_SQCM, EN_32B_ACCESS);
        }
@@ -2944,7 +2950,7 @@ static void
 add_render_compute_tuning_settings(struct drm_i915_private *i915,
                                   struct i915_wa_list *wal)
 {
-       if (IS_DG2(i915))
+       if (IS_DG2(i915) || IS_METEORLAKE(i915))
                wa_mcr_write_clr_set(wal, RT_CTRL, STACKID_CTRL, 
STACKID_CTRL_512);
 
        /*
-- 
2.34.1