> -----Original Message-----
> From: Bhadane, Dnyaneshwar <dnyaneshwar.bhad...@intel.com>
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S <matthew.s.atw...@intel.com>; Srivatsa, Anusha
> <anusha.sriva...@intel.com>; Bhadane, Dnyaneshwar
> <dnyaneshwar.bhad...@intel.com>
> Subject: [PATCH 01/11] drm/i915/TGL: s/TGL/TIGERLAKE for
> platform/subplatform defines
>
> Follow consistent naming convention. Replace TGL with TIGERLAKE.
>
Reviewed-by: Anusha Srivatsa <anusha.sriva...@intel.com>
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhad...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 2 +-
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 4 ++--
> drivers/gpu/drm/i915/intel_step.c | 2 +-
> 4 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index b7d20485bde5..9e34cc103aeb 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1390,7 +1390,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder
> *encoder,
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> if (crtc_state->port_clock > 270000) {
> - if (IS_TGL_UY(dev_priv)) {
> + if (IS_TIGERLAKE_UY(dev_priv)) {
> return
> intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2,
> n_entries);
> } else {
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 6b01a0b68b97..26def9cb86e4 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2196,7 +2196,7 @@ static bool gen12_plane_has_mc_ccs(struct
> drm_i915_private *i915,
>
> /* Wa_14010477008 */
> if (IS_DG1(i915) || IS_ROCKETLAKE(i915) ||
> - IS_TGL_DISPLAY_STEP(i915, STEP_A0, STEP_D0))
> + IS_TIGERLAKE_DISPLAY_STEP(i915, STEP_A0, STEP_D0))
> return false;
>
> /* Wa_22011186057 */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b4cf6f0f636d..0f30dc890209 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -647,7 +647,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_ICL_WITH_PORT_F(i915) \
> IS_SUBPLATFORM(i915, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
>
> -#define IS_TGL_UY(i915) \
> +#define IS_TIGERLAKE_UY(i915) \
> IS_SUBPLATFORM(i915, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)
>
> #define IS_SKL_GRAPHICS_STEP(p, since, until) (IS_SKYLAKE(p) &&
> IS_GRAPHICS_STEP(p, since, until)) @@ -662,7 +662,7 @@
> IS_SUBPLATFORM(const struct drm_i915_private *i915, #define
> IS_JSL_EHL_DISPLAY_STEP(p, since, until) \
> (IS_JSL_EHL(p) && IS_DISPLAY_STEP(p, since, until))
>
> -#define IS_TGL_DISPLAY_STEP(__i915, since, until) \
> +#define IS_TIGERLAKE_DISPLAY_STEP(__i915, since, until) \
> (IS_TIGERLAKE(__i915) && \
> IS_DISPLAY_STEP(__i915, since, until))
>
> diff --git a/drivers/gpu/drm/i915/intel_step.c
> b/drivers/gpu/drm/i915/intel_step.c
> index 8a9ff6227e53..67054c87bb5f 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -213,7 +213,7 @@ void intel_step_init(struct drm_i915_private *i915)
> } else if (IS_ROCKETLAKE(i915)) {
> revids = rkl_revids;
> size = ARRAY_SIZE(rkl_revids);
> - } else if (IS_TGL_UY(i915)) {
> + } else if (IS_TIGERLAKE_UY(i915)) {
> revids = tgl_uy_revids;
> size = ARRAY_SIZE(tgl_uy_revids);
> } else if (IS_TIGERLAKE(i915)) {
> --
> 2.34.1
