On Fri, Jul 21, 2023 at 06:15:07PM +0200, Andi Shyti wrote:
> We always assumed that a device might either have AUX or FLAT
> CCS, but this is an approximation that is not always true, e.g.
> PVC represents an exception.
> 
> Set the basis for future finer selection by implementing a
> boolean gen12_needs_ccs_aux_inv() function that tells whether aux
> invalidation is needed or not.
> 
> Currently PVC is the only exception to the above mentioned rule.
> 
> Signed-off-by: Andi Shyti <andi.sh...@linux.intel.com>
> Cc: Matt Roper <matthew.d.ro...@intel.com>
> Cc: Jonathan Cavitt <jonathan.cav...@intel.com>
> Cc: <sta...@vger.kernel.org> # v5.8+

Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
> b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index 563efee055602..460c9225a50fc 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -165,6 +165,18 @@ static u32 preparser_disable(bool state)
>       return MI_ARB_CHECK | 1 << 8 | state;
>  }
>  
> +static bool gen12_needs_ccs_aux_inv(struct intel_engine_cs *engine)
> +{
> +     if (IS_PONTEVECCHIO(engine->i915))
> +             return false;
> +
> +     /*
> +      * so far platforms supported by i915 having
> +      * flat ccs do not require AUX invalidation
> +      */
> +     return !HAS_FLAT_CCS(engine->i915);
> +}
> +
>  u32 *gen12_emit_aux_table_inv(struct intel_gt *gt, u32 *cs, const i915_reg_t 
> inv_reg)
>  {
>       u32 gsi_offset = gt->uncore->gsi_offset;
> @@ -267,7 +279,7 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 
> mode)
>               else if (engine->class == COMPUTE_CLASS)
>                       flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
>  
> -             if (!HAS_FLAT_CCS(rq->engine->i915))
> +             if (gen12_needs_ccs_aux_inv(rq->engine))
>                       count = 8 + 4;
>               else
>                       count = 8;
> @@ -285,7 +297,7 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 
> mode)
>  
>               cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
>  
> -             if (!HAS_FLAT_CCS(rq->engine->i915)) {
> +             if (gen12_needs_ccs_aux_inv(rq->engine)) {
>                       /* hsdes: 1809175790 */
>                       cs = gen12_emit_aux_table_inv(rq->engine->gt, cs,
>                                                     GEN12_CCS_AUX_INV);
> @@ -307,7 +319,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 
> mode)
>       if (mode & EMIT_INVALIDATE) {
>               cmd += 2;
>  
> -             if (!HAS_FLAT_CCS(rq->engine->i915) &&
> +             if (gen12_needs_ccs_aux_inv(rq->engine) &&
>                   (rq->engine->class == VIDEO_DECODE_CLASS ||
>                    rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
>                       aux_inv = rq->engine->mask &
> -- 
> 2.40.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

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