From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Now that i915 understands the caching modes behind PAT indices, and having
also special cased the Meteorlake snooping fully coherent mode, we can
remove the user PAT check from gpu_write_needs_clflush().
Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Cc: Fei Yang <fei.y...@intel.com>
Cc: Matt Roper <matthew.d.ro...@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index c15f83de33af..bf3a2fa0e539 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -41,12 +41,6 @@ static bool gpu_write_needs_clflush(struct
drm_i915_gem_object *obj)
if (IS_METEORLAKE(i915))
return false;
- /*
- * Always flush cache for UMD objects with PAT index set.
- */
- if (obj->pat_set_by_user)
- return true;
-
/*
* Fully coherent cached access may end up with data in the CPU cache
* which hasn't hit memory yet.
--
2.39.2
