-----Original Message----- From: Roper, Matthew D <matthew.d.ro...@intel.com> Sent: Tuesday, August 15, 2023 12:29 PM To: Cavitt, Jonathan <jonathan.cav...@intel.com> Cc: intel-gfx@lists.freedesktop.org; Dutt, Sudeep <sudeep.d...@intel.com>; chris.p.wil...@linux.intel.com; Gupta, saurabhg <saurabhg.gu...@intel.com>; Shyti, Andi <andi.sh...@intel.com>; Summers, Stuart <stuart.summ...@intel.com>; Das, Nirmoy <nirmoy....@intel.com>; Belgaumkar, Vinay <vinay.belgaum...@intel.com>; Winiarski, Michal <michal.winiar...@intel.com> Subject: Re: [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck > > On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote: > > Align igt_spinner_create_request with the hang_create_request > > implementation in selftest_hangcheck.c. > > > > Signed-off-by: Jonathan Cavitt <jonathan.cav...@intel.com> > > Reviewed-by: Matt Roper <matthew.d.ro...@intel.com> > > > For the second patch in the series, the general direction looks good to > me, but I'm not familiar enough with the spinner implementation and > context handling to do a detailed review there. Hopefully someone more > familiar with that code can take a look. >
Thank you for the RB! If it's not too much trouble, could you please push this patch (independent of the rest of the series) upstream? Sudeep would like to see this patch upstreamed as soon as possible to get MTL prepared for PV. I figured I'd ask you first since you provided the RB. Of course, if you're busy, that's understandable as well. -Jonathan Cavitt > > Matt > > > --- > > drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c > > b/drivers/gpu/drm/i915/selftests/igt_spinner.c > > index 0f064930ef11..8c3e1f20e5a1 100644 > > --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c > > +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c > > @@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin, > > > > *batch++ = arbitration_command; > > > > + memset32(batch, MI_NOOP, 128); > > + batch += 128; > > + > > if (GRAPHICS_VER(rq->i915) >= 8) > > *batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1; > > else if (IS_HASWELL(rq->i915)) > > -- > > 2.25.1 > > > > -- > Matt Roper > Graphics Software Engineer > Linux GPU Platform Enablement > Intel Corporation >
