On Wed, Aug 23, 2023 at 10:07:23AM -0700, Lucas De Marchi wrote:
> From: Gustavo Sousa <gustavo.so...@intel.com>
>
> The location of aux channels registers for Xe2 display changed w.r.t.
> the previous version.
This is another case of "PICA register ordering where 'A' comes after
'TC4.'" We should probably consolidate on the same design used in
"drm/i915/xe2lpd: Move registers to PICA."
Matt
>
> BSpec: 69010
> Signed-off-by: Gustavo Sousa <gustavo.so...@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 43 ++++++++++++++++++++-
> 1 file changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 3fcf609a1444..1ab6964ee1c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -714,6 +714,44 @@ static i915_reg_t xelpdp_aux_data_reg(struct intel_dp
> *intel_dp, int index)
> }
> }
>
> +static i915_reg_t xe2lpd_aux_ctl_reg(struct intel_dp *intel_dp)
> +{
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + enum aux_ch aux_ch = dig_port->aux_ch;
> +
> + switch (aux_ch) {
> + case AUX_CH_A:
> + case AUX_CH_B:
> + case AUX_CH_USBC1:
> + case AUX_CH_USBC2:
> + case AUX_CH_USBC3:
> + case AUX_CH_USBC4:
> + return XE2LPD_DP_AUX_CH_CTL(aux_ch);
> + default:
> + MISSING_CASE(aux_ch);
> + return XE2LPD_DP_AUX_CH_CTL(AUX_CH_A);
> + }
> +}
> +
> +static i915_reg_t xe2lpd_aux_data_reg(struct intel_dp *intel_dp, int index)
> +{
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + enum aux_ch aux_ch = dig_port->aux_ch;
> +
> + switch (aux_ch) {
> + case AUX_CH_A:
> + case AUX_CH_B:
> + case AUX_CH_USBC1:
> + case AUX_CH_USBC2:
> + case AUX_CH_USBC3:
> + case AUX_CH_USBC4:
> + return XE2LPD_DP_AUX_CH_DATA(aux_ch, index);
> + default:
> + MISSING_CASE(aux_ch);
> + return XE2LPD_DP_AUX_CH_DATA(AUX_CH_A, index);
> + }
> +}
> +
> void intel_dp_aux_fini(struct intel_dp *intel_dp)
> {
> if (cpu_latency_qos_request_active(&intel_dp->pm_qos))
> @@ -731,7 +769,10 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
> struct intel_encoder *encoder = &dig_port->base;
> enum aux_ch aux_ch = dig_port->aux_ch;
>
> - if (DISPLAY_VER(dev_priv) >= 14) {
> + if (DISPLAY_VER(dev_priv) >= 20) {
> + intel_dp->aux_ch_ctl_reg = xe2lpd_aux_ctl_reg;
> + intel_dp->aux_ch_data_reg = xe2lpd_aux_data_reg;
> + } else if (DISPLAY_VER(dev_priv) >= 14) {
> intel_dp->aux_ch_ctl_reg = xelpdp_aux_ctl_reg;
> intel_dp->aux_ch_data_reg = xelpdp_aux_data_reg;
> } else if (DISPLAY_VER(dev_priv) >= 12) {
> --
> 2.40.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
