FBC restriction with PSR2 can be removed from LNL onwards
Signed-off-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 66c8aed07bbc..d36499d7e0be 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1169,11 +1169,11 @@ static int intel_fbc_check_plane(struct
intel_atomic_state *state,
}
/*
- * Display 12+ is not supporting FBC with PSR2.
+ * Display 12 to 14 is not supporting FBC with PSR2.
* Recommendation is to keep this combination disabled
* Bspec: 50422 HSD: 14010260002
*/
- if (DISPLAY_VER(i915) >= 12 && crtc_state->has_psr2) {
+ if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
plane_state->no_fbc_reason = "PSR2 enabled";
return 0;
}
--
2.34.1
