From: Ville Syrjälä <ville.syrj...@linux.intel.com>

FBC on icl+ should supposedly be fine with surface sizes up to
8kx4k. Bump up the limit.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index fe21371db38c..0ac222eaddd2 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1028,7 +1028,10 @@ static bool intel_fbc_hw_tracking_covers_screen(const 
struct intel_plane_state *
        struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
        unsigned int effective_w, effective_h, max_w, max_h;
 
-       if (DISPLAY_VER(i915) >= 10) {
+       if (DISPLAY_VER(i915) >= 11) {
+               max_w = 8192;
+               max_h = 4096;
+       } else if (DISPLAY_VER(i915) >= 10) {
                max_w = 5120;
                max_h = 4096;
        } else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) {
-- 
2.41.0

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