From: Ville Syrjälä <ville.syrj...@linux.intel.com>
The PSR code is unconditionally enabling the VSC SDP whether or not PSR
itself is enabled. This means if the DP code decided not to use a VSC
SDP we're always transmitting a zeroed SDP. Not sure what the hardware
will even do in that case. We also see a "Failed to unpack DP VSC SDP"
message on every readout since the DIP buffer is just full of zeroes.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 8d180132a74b..931295934659 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1373,6 +1373,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
else
crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
+ if (!crtc_state->has_psr)
+ return;
+
crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
crtc_state->infoframes.enable |=
intel_hdmi_infoframe_enable(DP_SDP_VSC);
--
2.41.0
