On Thu, 2024-02-01 at 14:21 +0530, Suraj Kandpal wrote: > Add the register that needs to read and written onto for > deep pkgc programming. > > Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com> > --- > drivers/gpu/drm/i915/display/skl_watermark_regs.h | 4 ++++ > 1 file changed, 4 insertions(+)
Reviewed-by: Vinod Govindapillai <vinod.govindapil...@intel.com> > > diff --git a/drivers/gpu/drm/i915/display/skl_watermark_regs.h > b/drivers/gpu/drm/i915/display/skl_watermark_regs.h > index 628c5920ad49..20b30c9a6613 100644 > --- a/drivers/gpu/drm/i915/display/skl_watermark_regs.h > +++ b/drivers/gpu/drm/i915/display/skl_watermark_regs.h > @@ -157,4 +157,8 @@ > #define MTL_LATENCY_SAGV _MMIO(0x4578c) > #define MTL_LATENCY_QCLK_SAGV REG_GENMASK(12, 0) > > +#define LNL_PKG_C_LATENCY _MMIO(0x46460) > +#define LNL_ADDED_WAKE_TIME_MASK REG_GENMASK(28, 16) > +#define LNL_PKG_C_LATENCY_MASK REG_GENMASK(12, 0) > + > #endif /* __SKL_WATERMARK_REGS_H__ */