Add get function for silence period and lfps half cycle. Values are taken
from the tables in bspec.
Bspec: 71632
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/display/intel_psr.c | 77 ++++++++++++++++++-
2 files changed, 77 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index df82551a3f42..1bb72e606367 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1723,6 +1723,8 @@ struct intel_psr {
u8 check_entry_lines;
u8 aux_less_wake_lines;
u8 switch_to_active_lines;
+ u8 silence_period_sym_clocks;
+ u8 lfps_half_cycle_num_of_syms;
} alpm_parameters;
ktime_t last_entry_attempt;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 4cefb9ada5db..8385d8172b27 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1126,6 +1126,72 @@ static bool
_compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
return true;
}
+/*
+ * See Bspec: 71632 for the table
+ *
+ * Silence_period = tSilence,Min + ((tSilence,Max - tSilence,Min) / 2)
+ *
+ * Half cycle duration:
+ *
+ * Link rates 1.62 - 4.32 and tLFPS = 70 ns
+ * FLOOR( (Link Rate * tLFPS_Cycle) / (2 * 10) )
+ *
+ * Link rates 5.4 - 8.1
+ * FLOOR( LFPS Period in Symbol clocks /
+ * (2 * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ]) )
+ */
+static bool _lnl_get_silence_period_and_lfps_half_cycle(int link_rate,
+ int *silence_period,
+ int *lfps_half_cycle)
+{
+ switch (link_rate) {
+ case 162000:
+ *silence_period = 20;
+ *lfps_half_cycle = 5;
+ break;
+ case 216000:
+ *silence_period = 27;
+ *lfps_half_cycle = 7;
+ break;
+ case 243000:
+ *silence_period = 31;
+ *lfps_half_cycle = 8;
+ break;
+ case 270000:
+ *silence_period = 34;
+ *lfps_half_cycle = 9;
+ break;
+ case 324000:
+ *silence_period = 41;
+ *lfps_half_cycle = 11;
+ break;
+ case 432000:
+ *silence_period = 56;
+ *lfps_half_cycle = 15;
+ break;
+ case 540000:
+ *silence_period = 69;
+ *lfps_half_cycle = 12;
+ break;
+ case 648000:
+ *silence_period = 84;
+ *lfps_half_cycle = 15;
+ break;
+ case 675000:
+ *silence_period = 87;
+ *lfps_half_cycle = 15;
+ break;
+ case 810000:
+ *silence_period = 104;
+ *lfps_half_cycle = 19;
+ break;
+ default:
+ *silence_period = *lfps_half_cycle = -1;
+ return false;
+ }
+ return true;
+}
+
/*
* AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
* tSilence, Max+ tPHY Establishment + tCDS) / tline)
@@ -1170,7 +1236,8 @@ static int _lnl_compute_aux_less_alpm_params(struct
intel_dp *intel_dp,
struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- int aux_less_wake_time, aux_less_wake_lines, switch_to_active_lines;
+ int aux_less_wake_time, aux_less_wake_lines, switch_to_active_lines,
+ silence_period, lfps_half_cycle;
aux_less_wake_time =
_lnl_compute_aux_less_wake_time(crtc_state->port_clock / 1000);
@@ -1182,7 +1249,11 @@ static int _lnl_compute_aux_less_alpm_params(struct
intel_dp *intel_dp,
&crtc_state->hw.adjusted_mode,
_lnl_compute_switch_to_active_time(crtc_state->port_clock / 1000));
- if (aux_less_wake_lines > 32 || switch_to_active_lines > 32)
+ if (aux_less_wake_lines > 32 || switch_to_active_lines > 32 ||
+ silence_period > 256 || silence_period < 0 ||
+ !_lnl_get_silence_period_and_lfps_half_cycle(intel_dp->link_rate,
+ &silence_period,
+ &lfps_half_cycle))
return false;
if (i915->display.params.psr_safest_params) {
@@ -1192,6 +1263,8 @@ static int _lnl_compute_aux_less_alpm_params(struct
intel_dp *intel_dp,
intel_dp->psr.alpm_parameters.aux_less_wake_lines = aux_less_wake_lines;
intel_dp->psr.alpm_parameters.switch_to_active_lines =
switch_to_active_lines;
+ intel_dp->psr.alpm_parameters.silence_period_sym_clocks =
silence_period;
+ intel_dp->psr.alpm_parameters.lfps_half_cycle_num_of_syms =
lfps_half_cycle;
return true;
}
--
2.34.1
