[PATCH 1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

ICL_AUX_ANAOVRD1 is actually ICL_PORT_TX_DW6_AUX. Give it its proper
name, and relocate to the correct file (intel_combo_phy_regs.h).

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_combo_phy_regs.h     | 6 ++++++
 drivers/gpu/drm/i915/display/intel_display_power_well.c | 5 ++++-
 drivers/gpu/drm/i915/i915_reg.h                         | 9 ---------
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h 
b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
index b0983edccf3f..1d931557cd79 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
@@ -142,6 +142,12 @@
 #define   RTERM_SELECT(x)                      ((x) << 3)
 #define   RTERM_SELECT_MASK                    (0x7 << 3)
 
+#define ICL_PORT_TX_DW6_AUX(phy)               _MMIO(_ICL_PORT_TX_DW_AUX(6, 
phy))
+#define ICL_PORT_TX_DW6_GRP(phy)               _MMIO(_ICL_PORT_TX_DW_GRP(6, 
phy))
+#define ICL_PORT_TX_DW6_LN(ln, phy)            _MMIO(_ICL_PORT_TX_DW_LN(6, ln, 
phy))
+#define   ICL_AUX_ANAOVRD1_LDO_BYPASS          (1 << 7)
+#define   ICL_AUX_ANAOVRD1_ENABLE              (1 << 0)
+
 #define ICL_PORT_TX_DW7_AUX(phy)               _MMIO(_ICL_PORT_TX_DW_AUX(7, 
phy))
 #define ICL_PORT_TX_DW7_GRP(phy)               _MMIO(_ICL_PORT_TX_DW_GRP(7, 
phy))
 #define ICL_PORT_TX_DW7_LN(ln, phy)            _MMIO(_ICL_PORT_TX_DW_LN(7, ln, 
phy))
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c 
b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index c20e80aded35..a1edac6ce31f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -199,6 +199,9 @@ static void hsw_power_well_pre_disable(struct 
drm_i915_private *dev_priv,
                gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
 }
 
+#define ICL_AUX_PW_TO_PHY(pw_idx)      \
+       ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + PHY_A)
+
 #define ICL_AUX_PW_TO_CH(pw_idx)       \
        ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
 
@@ -426,7 +429,7 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private 
*dev_priv,
        /* Display WA #1178: icl */
        if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
            !intel_port_is_edp(dev_priv, (enum port)phy))
-               intel_de_rmw(dev_priv, ICL_AUX_ANAOVRD1(pw_idx),
+               intel_de_rmw(dev_priv, 
ICL_PORT_TX_DW6_AUX(ICL_AUX_PW_TO_PHY(pw_idx)),
                             0, ICL_AUX_ANAOVRD1_ENABLE | 
ICL_AUX_ANAOVRD1_LDO_BYPASS);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e00557e1a57f..74e943f21475 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5566,15 +5566,6 @@ enum skl_power_gate {
        ((pw_idx) - ICL_PW_CTL_IDX_PW_1 + SKL_PG1)
 #define  SKL_FUSE_PG_DIST_STATUS(pg)           (1 << (27 - (pg)))
 
-#define _ICL_AUX_REG_IDX(pw_idx)       ((pw_idx) - ICL_PW_CTL_IDX_AUX_A)
-#define _ICL_AUX_ANAOVRD1_A            0x162398
-#define _ICL_AUX_ANAOVRD1_B            0x6C398
-#define ICL_AUX_ANAOVRD1(pw_idx)       _MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \
-                                                   _ICL_AUX_ANAOVRD1_A, \
-                                                   _ICL_AUX_ANAOVRD1_B))
-#define   ICL_AUX_ANAOVRD1_LDO_BYPASS  (1 << 7)
-#define   ICL_AUX_ANAOVRD1_ENABLE      (1 << 0)
-
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A          0x60400
 #define _TRANS_DDI_FUNC_CTL_B          0x61400
-- 
2.43.0