2014-02-20 21:01 GMT-03:00 Ben Widawsky <benjamin.widaw...@intel.com>:
> This got lost when we shuffled around our internal branch and
> GEN7_FEATURES macro. There were no HW changes to support FBC, so we just
> need to set the flag.
>
> v2: Don't allow FBC for any pipe but A on platforms with DDI. (Paulo)
>
> Cc: Daisy Sun <daisy....@intel.com>
> Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 ++
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index a18c27d..dc44048 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -265,6 +265,7 @@ static const struct intel_device_info
> intel_broadwell_d_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .has_llc = 1,
> .has_ddi = 1,
> + .has_fbc = 1,
> GEN_DEFAULT_PIPEOFFSETS,
> };
>
> @@ -274,6 +275,7 @@ static const struct intel_device_info
> intel_broadwell_m_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .has_llc = 1,
> .has_ddi = 1,
> + .has_fbc = 1,
> GEN_DEFAULT_PIPEOFFSETS,
> };
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a03a12e..4f01b04 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -540,7 +540,7 @@ void intel_update_fbc(struct drm_device *dev)
> DRM_DEBUG_KMS("mode too large for compression,
> disabling\n");
> goto out_disable;
> }
> - if ((INTEL_INFO(dev)->gen < 4 || IS_HASWELL(dev)) &&
> + if ((INTEL_INFO(dev)->gen < 4 || HAS_DDI(dev)) &&
> intel_crtc->plane != PLANE_A) {
> if (set_no_fbc_reason(dev_priv, FBC_BAD_PLANE))
> DRM_DEBUG_KMS("plane not A, disabling compression\n");
> --
> 1.9.0
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
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