From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>

To enable adding override of the default engine context image let us start
shadowing the per engine state in the context.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Cc: Carlos Santa <carlos.sa...@intel.com>
Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>
Signed-off-by: Tvrtko Ursulin <tursu...@igalia.com>
---
 drivers/gpu/drm/i915/gt/intel_context_types.h   | 2 ++
 drivers/gpu/drm/i915/gt/intel_lrc.c             | 7 ++++---
 drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 ++++---
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ed95a7b57cbb..6ae8abfeccdb 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -99,6 +99,8 @@ struct intel_context {
        struct i915_address_space *vm;
        struct i915_gem_context __rcu *gem_context;
 
+       struct file *default_state;
+
        /*
         * @signal_lock protects the list of requests that need signaling,
         * @signals. While there are any requests that need signaling,
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b387146ede98..d4ffb352403c 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1017,9 +1017,8 @@ void lrc_init_state(struct intel_context *ce,
 
        set_redzone(state, engine);
 
-       if (engine->default_state) {
-               shmem_read(engine->default_state, 0,
-                          state, engine->context_size);
+       if (ce->default_state) {
+               shmem_read(ce->default_state, 0, state, engine->context_size);
                __set_bit(CONTEXT_VALID_BIT, &ce->flags);
                inhibit = false;
        }
@@ -1131,6 +1130,8 @@ int lrc_alloc(struct intel_context *ce, struct 
intel_engine_cs *engine)
 
        GEM_BUG_ON(ce->state);
 
+       ce->default_state = engine->default_state;
+
        vma = __lrc_alloc_state(ce, engine);
        if (IS_ERR(vma))
                return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c 
b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 92085ffd23de..8625e88e785f 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -474,8 +474,7 @@ static int ring_context_init_default_state(struct 
intel_context *ce,
        if (IS_ERR(vaddr))
                return PTR_ERR(vaddr);
 
-       shmem_read(ce->engine->default_state, 0,
-                  vaddr, ce->engine->context_size);
+       shmem_read(ce->default_state, 0, vaddr, ce->engine->context_size);
 
        i915_gem_object_flush_map(obj);
        __i915_gem_object_release_map(obj);
@@ -491,7 +490,7 @@ static int ring_context_pre_pin(struct intel_context *ce,
        struct i915_address_space *vm;
        int err = 0;
 
-       if (ce->engine->default_state &&
+       if (ce->default_state &&
            !test_bit(CONTEXT_VALID_BIT, &ce->flags)) {
                err = ring_context_init_default_state(ce, ww);
                if (err)
@@ -570,6 +569,8 @@ static int ring_context_alloc(struct intel_context *ce)
 {
        struct intel_engine_cs *engine = ce->engine;
 
+       ce->default_state = engine->default_state;
+
        /* One ringbuffer to rule them all */
        GEM_BUG_ON(!engine->legacy.ring);
        ce->ring = engine->legacy.ring;
-- 
2.44.0

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