[PATCH 01/12] drm/i915/wm: rename intel_get_cxsr_latency -> pnv_get_cxsr_latency

[Jani Nikula]

Clarify that the function is specific to PNV, making subsequent changes
slightly easier to grasp.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c 
b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 628e7192ebc9..8657ec0abd2d 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -70,7 +70,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
        {0, 1, 400, 800, 6042, 36042, 6584, 36584},    /* DDR3-800 SC */
 };
 
-static const struct cxsr_latency *intel_get_cxsr_latency(struct 
drm_i915_private *i915)
+static const struct cxsr_latency *pnv_get_cxsr_latency(struct drm_i915_private 
*i915)
 {
        int i;
 
@@ -635,7 +635,7 @@ static void pnv_update_wm(struct drm_i915_private *dev_priv)
        u32 reg;
        unsigned int wm;
 
-       latency = intel_get_cxsr_latency(dev_priv);
+       latency = pnv_get_cxsr_latency(dev_priv);
        if (!latency) {
                drm_dbg_kms(&dev_priv->drm,
                            "Unknown FSB/MEM found, disable CxSR\n");
@@ -4022,7 +4022,7 @@ void i9xx_wm_init(struct drm_i915_private *dev_priv)
                g4x_setup_wm_latency(dev_priv);
                dev_priv->display.funcs.wm = &g4x_wm_funcs;
        } else if (IS_PINEVIEW(dev_priv)) {
-               if (!intel_get_cxsr_latency(dev_priv)) {
+               if (!pnv_get_cxsr_latency(dev_priv)) {
                        drm_info(&dev_priv->drm,
                                 "failed to find known CxSR latency "
                                 "(found ddr%s fsb freq %d, mem freq %d), "
-- 
2.39.2