[PATCH] drm/i915/display: BMG supports UHBR13.5

[Arun R Murthy]

UHBR20 is not supported by battlemage and the maximum link rate
supported is UHBR13.5

HSD: 16023263677
Signed-off-by: Arun R Murthy <arun.r.mur...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 789c2f78826d..3232ec4b2889 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -528,6 +528,10 @@ static void
 intel_dp_set_source_rates(struct intel_dp *intel_dp)
 {
        /* The values must be in increasing order */
+       static const int bmg_rates[] = {
+               162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
+               810000, 1000000, 1350000,
+       };
        static const int mtl_rates[] = {
                162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
                810000, 1000000, 2000000,
@@ -558,8 +562,13 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
                    intel_dp->source_rates || intel_dp->num_source_rates);
 
        if (DISPLAY_VER(dev_priv) >= 14) {
-               source_rates = mtl_rates;
-               size = ARRAY_SIZE(mtl_rates);
+               if (IS_DGFX(dev_priv)) {
+                       source_rates = bmg_rates;
+                       size = ARRAY_SIZE(bmg_rates);
+               } else {
+                       source_rates = mtl_rates;
+                       size = ARRAY_SIZE(mtl_rates);
+               }
                max_rate = mtl_max_source_rate(intel_dp);
        } else if (DISPLAY_VER(dev_priv) >= 11) {
                source_rates = icl_rates;
-- 
2.25.1