From: Suraj Kandpal <[email protected]> Read PICA register to see if edp over type C is possible and then add the appropriate tables for it.
Bspec: 68846 Signed-off-by: Suraj Kandpal <[email protected]> Signed-off-by: Matt Atwood <[email protected]> --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 ++ .../gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ 4 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 0d6f75ae35f5..1c8c2a2b05e1 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -2261,6 +2261,8 @@ intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state, if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) { if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1)) return xe2hpd_c20_edp_tables; + if (DISPLAY_VER(i915) >= 30 && encoder->typec_supp) + return xe3lpd_c20_dp_edp_tables; } if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1)) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 2bb1fa64da2f..e9dc7707fbcd 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -158,6 +158,7 @@ struct intel_encoder { enum port port; u16 cloneable; u8 pipe_mask; + bool typec_supp; /* Check and recover a bad link state. */ struct delayed_work link_check_work; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index fbb096be02ad..917a503cc43b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5570,6 +5570,20 @@ intel_dp_detect_sdp_caps(struct intel_dp *intel_dp) drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd); } +static void +intel_dp_check_edp_typec_supp(struct intel_encoder *encoder) +{ + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + bool is_tc_port = intel_encoder_is_tc(encoder); + u32 ret = 0; + + if (encoder->type != INTEL_OUTPUT_EDP || !is_tc_port) + return; + + ret = intel_de_read(i915, PICA_PHY_CONFIG_CONTROL); + encoder->typec_supp = ret & EDP_ON_TYPEC; +} + static int intel_dp_detect(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, @@ -5595,6 +5609,8 @@ intel_dp_detect(struct drm_connector *connector, if (!intel_display_driver_check_access(dev_priv)) return connector->status; + intel_dp_check_edp_typec_supp(encoder); + /* Can't disconnect eDP */ if (intel_dp_is_edp(intel_dp)) status = edp_detect(intel_dp); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index da65500cd0c8..5f5a6ade5f8c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4583,4 +4583,7 @@ enum skl_power_gate { #define MTL_MEDIA_GSI_BASE 0x380000 +#define PICA_PHY_CONFIG_CONTROL _MMIO(0x16FE68) +#define EDP_ON_TYPEC REG_BIT(31) + #endif /* _I915_REG_H_ */ -- 2.45.0
