Certain resolutions require 12 DSC slices support along with ultrajoiner.
For such cases, the third VDSC Engine per Pipe is enabled. Each VDSC
Engine processes 1 Slice, resulting in a total of 12 VDSC Instances
(4 Pipes * 3 VDSC Instances per Pipe).
Add support for 12 DSC slices and 3 VDSC engines for such modes.

v2: Add missing check for 3 slices support only with 4 joined pipes.
(Suraj)

Signed-off-by: Ankit Nautiyal <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index ef96b9235636..91ae29d76cf5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -110,8 +110,10 @@ static const u8 valid_dsc_bpp[] = {6, 8, 10, 12, 15};
 
 /* With Single pipe configuration, HW is capable of supporting maximum
  * of 4 slices per line.
+ * For higher resolutions where 12 slice support is required with
+ * ultrajoiner, only then each pipe can support 3 slices.
  */
-static const u8 valid_dsc_slicecount[] = {1, 2, 4};
+static const u8 valid_dsc_slicecount[] = {1, 2, 3, 4};
 
 /**
  * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or 
PCH)
@@ -1043,6 +1045,13 @@ u8 intel_dp_dsc_get_slice_count(const struct 
intel_connector *connector,
        for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
                u8 test_slice_count = valid_dsc_slicecount[i] * 
num_joined_pipes;
 
+               /*
+                * 3 DSC Slices per pipe need 3 DSC engines,
+                * which is supported only with Ultrajoiner.
+                */
+               if (valid_dsc_slicecount[i] == 3 && num_joined_pipes != 4)
+                       continue;
+
                if (test_slice_count >
                    drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, 
false))
                        break;
@@ -2463,8 +2472,13 @@ int intel_dp_dsc_compute_config(struct intel_dp 
*intel_dp,
         * VDSC engine operates at 1 Pixel per clock, so if peak pixel rate
         * is greater than the maximum Cdclock and if slice count is even
         * then we need to use 2 VDSC instances.
+        * In case of Ultrajoiner along with 12 slices we need to use 3
+        * VDSC instances.
         */
-       if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
+       if (pipe_config->joiner_pipes && num_joined_pipes == 4 &&
+           pipe_config->dsc.slice_count == 12)
+               pipe_config->dsc.dsc_split = INTEL_DSC_SPLIT_3_STREAMS;
+       else if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
                pipe_config->dsc.dsc_split = INTEL_DSC_SPLIT_2_STREAMS;
 
        ret = intel_dp_dsc_compute_params(connector, pipe_config);
-- 
2.45.2

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