On Wed, 23 Oct 2024, Clint Taylor <[email protected]> wrote: > From: Suraj Kandpal <[email protected]> > > Read PICA register to see if edp over type C is possible and then > add the appropriate tables for it.
I've rejected this before, look up the review comments and adjust. BR, Jani. > > --v2 > -remove bool from intel_encoder have it in runtime_info [Jani] > -initialize the bool in runtime_info init [Jani] > -dont abbreviate the bool [Jani] > > Bspec: 68846 > Signed-off-by: Suraj Kandpal <[email protected]> > Signed-off-by: Matt Atwood <[email protected]> > Reviewed-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++++ > .../gpu/drm/i915/display/intel_display_device.c | 4 ++++ > .../gpu/drm/i915/display/intel_display_device.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++++++++--- > drivers/gpu/drm/i915/display/intel_dp.h | 5 +++++ > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > 6 files changed, 31 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 8bd5a4d1b735..ef14e12828c3 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -2257,9 +2257,13 @@ intel_c20_pll_tables_get(struct intel_crtc_state > *crtc_state, > struct intel_encoder *encoder) > { > struct drm_i915_private *i915 = to_i915(encoder->base.dev); > + struct intel_display_runtime_info *display_runtime = > DISPLAY_RUNTIME_INFO(i915); > > if (intel_crtc_has_dp_encoder(crtc_state)) { > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) { > + if (DISPLAY_VER(i915) >= 30 && > + display_runtime->edp_typec_support) > + return xe3lpd_c20_dp_edp_tables; > if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1)) > return xe2hpd_c20_edp_tables; > } > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c > b/drivers/gpu/drm/i915/display/intel_display_device.c > index aa22189e3853..8583c3529060 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.c > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c > @@ -15,6 +15,7 @@ > #include "intel_display_params.h" > #include "intel_display_power.h" > #include "intel_display_reg_defs.h" > +#include "intel_dp.h" > #include "intel_fbc.h" > #include "intel_step.h" > > @@ -1685,6 +1686,9 @@ static void > __intel_display_device_info_runtime_init(struct drm_i915_private *i9 > } > } > > + if (DISPLAY_VER(i915) >= 30) > + intel_dp_check_edp_typec_support(display, display_runtime); > + > display_runtime->rawclk_freq = intel_read_rawclk(display); > drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", > display_runtime->rawclk_freq); > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h > b/drivers/gpu/drm/i915/display/intel_display_device.h > index 071a36b51f79..410f8b33a8a1 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.h > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h > @@ -232,6 +232,7 @@ struct intel_display_runtime_info { > bool has_hdcp; > bool has_dmc; > bool has_dsc; > + bool edp_typec_support; > }; > > struct intel_display_device_info { > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 7e29619ba040..992cc51e07b5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -5572,6 +5572,16 @@ intel_dp_detect_sdp_caps(struct intel_dp *intel_dp) > drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd); > } > > +void > +intel_dp_check_edp_typec_support(struct intel_display *display, > + struct intel_display_runtime_info > *display_runtime) > +{ > + u32 ret = 0; > + > + ret = intel_de_read(display, PICA_PHY_CONFIG_CONTROL); > + display_runtime->edp_typec_support = ret & EDP_ON_TYPEC; > +} > + > static int > intel_dp_detect(struct drm_connector *connector, > struct drm_modeset_acquire_ctx *ctx, > @@ -6441,10 +6451,11 @@ intel_dp_init_connector(struct intel_digital_port > *dig_port, > > if (_intel_dp_is_port_edp(dev_priv, intel_encoder->devdata, port)) { > /* > - * Currently we don't support eDP on TypeC ports, although in > - * theory it could work on TypeC legacy ports. > + * Currently we don't support eDP on TypeC ports for > DISPLAY_VER < 30, > + * although in theory it could work on TypeC legacy ports. > */ > - drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder)); > + if (DISPLAY_VER(dev_priv) < 30) > + drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder)); > type = DRM_MODE_CONNECTOR_eDP; > intel_encoder->type = INTEL_OUTPUT_EDP; > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index 60baf4072dc9..c6a80c4e2166 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -20,6 +20,8 @@ struct intel_atomic_state; > struct intel_connector; > struct intel_crtc_state; > struct intel_digital_port; > +struct intel_display; > +struct intel_display_runtime_info; > struct intel_dp; > struct intel_encoder; > > @@ -204,5 +206,8 @@ bool intel_dp_link_params_valid(struct intel_dp > *intel_dp, int link_rate, > u8 lane_count); > bool intel_dp_has_connector(struct intel_dp *intel_dp, > const struct drm_connector_state *conn_state); > +void > +intel_dp_check_edp_typec_support(struct intel_display *display, > + struct intel_display_runtime_info > *display_runtime); > > #endif /* __INTEL_DP_H__ */ > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 8d758947f301..2743a2dd0a3d 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4575,4 +4575,7 @@ enum skl_power_gate { > > #define MTL_MEDIA_GSI_BASE 0x380000 > > +#define PICA_PHY_CONFIG_CONTROL _MMIO(0x16FE68) > +#define EDP_ON_TYPEC REG_BIT(31) > + > #endif /* _I915_REG_H_ */ -- Jani Nikula, Intel
