On Wed, Oct 30, 2024 at 04:34:17PM +0100, Andi Shyti wrote:
> Hi Raag,
> 
> ...
> 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h 
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 89e4381f8baa..d400c77423a5 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3617,6 +3617,7 @@
> >  #define        POWER_SETUP_I1_WATTS                REG_BIT(31)
> >  #define        POWER_SETUP_I1_SHIFT                6       /* 10.6 fixed 
> > point format */
> >  #define        POWER_SETUP_I1_DATA_MASK            REG_GENMASK(15, 0)
> > +#define     POWER_SETUP_SUBCOMMAND_G8_ENABLE       0x6
> 
> 0x06 for alignment, please.

This is aligned with POWER_SETUP_SUBCOMMAND macros which are not visible
in the diff :(

Raag

> >  #define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US        0x23
> >  #define   XEHP_PCODE_FREQUENCY_CONFIG              0x6e    /* pvc */
> >  /* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> > -- 
> > 2.34.1

Reply via email to