> -----Original Message----- > From: Intel-xe <[email protected]> On Behalf Of Jouni > Högander > Sent: Thursday, January 9, 2025 1:02 PM > To: [email protected]; [email protected] > Cc: Hogander, Jouni <[email protected]> > Subject: [PATCH v3 07/10] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL > handling when DSB is in use > > Do needed changes to handle PSR2_MAN_TRK_CTL correctly when DSB is in > use: > > 1. Write PSR2_MAN_TRK_CTL in commit_pipe_pre_planes only when not > using > DSB. > 2. Add PSR2_MAN_TRK_CTL writing into DSB commit in > intel_atomic_dsb_finish. > > Taking PSR lock over DSB commit is not needed because PSR2_MAN_TRK_CTL > is > now written only by DSB. > > Signed-off-by: Jouni Högander <[email protected]>
Reviewed-by: Animesh Manna <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_display.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 5a5100f147a6..d76454a69399 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -7089,7 +7089,8 @@ static void commit_pipe_pre_planes(struct > intel_atomic_state *state, > intel_pipe_fastset(old_crtc_state, new_crtc_state); > } > > - intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); > + if (!new_crtc_state->use_dsb) > + intel_psr2_program_trans_man_trk_ctl(NULL, > new_crtc_state); > > intel_atomic_update_watermarks(state, crtc); > } > @@ -7678,6 +7679,8 @@ static void intel_atomic_dsb_finish(struct > intel_atomic_state *state, > new_crtc_state); > bdw_set_pipe_misc(new_crtc_state->dsb_commit, > new_crtc_state); > + intel_psr2_program_trans_man_trk_ctl(new_crtc_state- > >dsb_commit, > + new_crtc_state); > intel_crtc_planes_update_arm(new_crtc_state- > >dsb_commit, > state, crtc); > > -- > 2.43.0
