From: Ville Syrjälä <[email protected]>

Update a bunch of bw related stuff during readout:
- bw_state->dbuf_bw possible now that the wm readout
  has given us access to the plane ddb data
- cdclk_state->bw_min_cdclk

Signed-off-by: Ville Syrjälä <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_bw.c    | 3 +++
 drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index 19b516084fac..69f3de0bba6a 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1495,6 +1495,8 @@ void intel_bw_update_hw_state(struct intel_display 
*display)
 
                if (DISPLAY_VER(display) >= 11)
                        intel_bw_crtc_update(bw_state, crtc_state);
+
+               skl_crtc_calc_dbuf_bw(&bw_state->dbuf_bw[pipe], crtc_state);
        }
 }
 
@@ -1510,6 +1512,7 @@ void intel_bw_crtc_disable_noatomic(struct intel_crtc 
*crtc)
 
        bw_state->data_rate[pipe] = 0;
        bw_state->num_active_planes[pipe] = 0;
+       memset(&bw_state->dbuf_bw[pipe], 0, sizeof(bw_state->dbuf_bw[pipe]));
 }
 
 static struct intel_global_state *
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 984fd9f98c9f..ea2fbee2d62f 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3341,6 +3341,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state 
*state)
 
 void intel_cdclk_update_hw_state(struct intel_display *display)
 {
+       const struct intel_bw_state *bw_state =
+               to_intel_bw_state(display->bw.obj.state);
        struct intel_cdclk_state *cdclk_state =
                to_intel_cdclk_state(display->cdclk.obj.state);
        struct intel_crtc *crtc;
@@ -3358,6 +3360,8 @@ void intel_cdclk_update_hw_state(struct intel_display 
*display)
                cdclk_state->min_cdclk[pipe] = 
intel_crtc_compute_min_cdclk(crtc_state);
                cdclk_state->min_voltage_level[pipe] = 
crtc_state->min_voltage_level;
        }
+
+       cdclk_state->bw_min_cdclk = intel_bw_min_cdclk(display, bw_state);
 }
 
 void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc)
-- 
2.45.3

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