On Wed, 17 Sep 2025, Ville Syrjälä <[email protected]> wrote:
> On Wed, Sep 17, 2025 at 04:52:00PM +0300, Jani Nikula wrote:
>> The caching at the initial read is a bit fragile in case, say, a further
>> refactoring starts reading the frequencies at a time where it's not
>> possible. Add a note about it.
>>
>> Suggested-by: Ville Syrjälä <[email protected]>
>> Signed-off-by: Jani Nikula <[email protected]>
>
> Reviewed-by: Ville Syrjälä <[email protected]>
Thanks, pushed.
>
>> ---
>> drivers/gpu/drm/i915/display/vlv_clock.c | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/vlv_clock.c
>> b/drivers/gpu/drm/i915/display/vlv_clock.c
>> index 2c55083d8fdb..42c2837b32c1 100644
>> --- a/drivers/gpu/drm/i915/display/vlv_clock.c
>> +++ b/drivers/gpu/drm/i915/display/vlv_clock.c
>> @@ -8,6 +8,13 @@
>> #include "vlv_clock.h"
>> #include "vlv_sideband.h"
>>
>> +/*
>> + * FIXME: The caching of hpll_freq and czclk_freq relies on the first calls
>> + * occurring at a time when they can actually be read. This appears to be
>> the
>> + * case, but is somewhat fragile. Make the initialization explicit at a
>> point
>> + * where they can be reliably read.
>> + */
>> +
>> /* returns HPLL frequency in kHz */
>> int vlv_clock_get_hpll_vco(struct drm_device *drm)
>> {
>> --
>> 2.47.3
--
Jani Nikula, Intel
