From: Ville Syrjälä <[email protected]>

Hide the cdclk state details better by providing a helper
(intel_cdclk_update_bw_min_cdclk()) by which the bw code can
inform the cdclk code about a new bw_min_cdclk value.

Signed-off-by: Ville Syrjälä <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_bw.c    | 43 ++++------------------
 drivers/gpu/drm/i915/display/intel_cdclk.c | 28 ++++++++++++++
 drivers/gpu/drm/i915/display/intel_cdclk.h |  3 ++
 3 files changed, 38 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index 8232b344a88f..7499ddec2b14 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1405,12 +1405,10 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state 
*state,
        struct intel_display *display = to_intel_display(state);
        struct intel_bw_state *new_bw_state = NULL;
        const struct intel_bw_state *old_bw_state = NULL;
-       const struct intel_cdclk_state *cdclk_state;
        const struct intel_crtc_state *old_crtc_state;
        const struct intel_crtc_state *new_crtc_state;
-       int old_min_cdclk, new_min_cdclk;
        struct intel_crtc *crtc;
-       int i;
+       int ret, i;
 
        if (DISPLAY_VER(display) < 9)
                return 0;
@@ -1443,39 +1441,12 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state 
*state,
                        return ret;
        }
 
-       old_min_cdclk = intel_bw_min_cdclk(display, old_bw_state);
-       new_min_cdclk = intel_bw_min_cdclk(display, new_bw_state);
-
-       /*
-        * No need to check against the cdclk state if
-        * the min cdclk doesn't increase.
-        *
-        * Ie. we only ever increase the cdclk due to bandwidth
-        * requirements. This can reduce back and forth
-        * display blinking due to constant cdclk changes.
-        */
-       if (new_min_cdclk <= old_min_cdclk)
-               return 0;
-
-       cdclk_state = intel_atomic_get_cdclk_state(state);
-       if (IS_ERR(cdclk_state))
-               return PTR_ERR(cdclk_state);
-
-       /*
-        * No need to recalculate the cdclk state if
-        * the min cdclk doesn't increase.
-        *
-        * Ie. we only ever increase the cdclk due to bandwidth
-        * requirements. This can reduce back and forth
-        * display blinking due to constant cdclk changes.
-        */
-       if (new_min_cdclk <= intel_cdclk_bw_min_cdclk(cdclk_state))
-               return 0;
-
-       drm_dbg_kms(display->drm,
-                   "new bandwidth min cdclk (%d kHz) > old min cdclk (%d 
kHz)\n",
-                   new_min_cdclk, intel_cdclk_bw_min_cdclk(cdclk_state));
-       *need_cdclk_calc = true;
+       ret = intel_cdclk_update_bw_min_cdclk(state,
+                                             intel_bw_min_cdclk(display, 
old_bw_state),
+                                             intel_bw_min_cdclk(display, 
new_bw_state),
+                                             need_cdclk_calc);
+       if (ret)
+               return ret;
 
        return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index c3ff8cbf1d78..3257f1f4fc11 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2836,6 +2836,34 @@ static int intel_crtc_compute_min_cdclk(const struct 
intel_crtc_state *crtc_stat
        return min_cdclk;
 }
 
+int intel_cdclk_update_bw_min_cdclk(struct intel_atomic_state *state,
+                                   int old_min_cdclk, int new_min_cdclk,
+                                   bool *need_cdclk_calc)
+{
+       struct intel_display *display = to_intel_display(state);
+       struct intel_cdclk_state *cdclk_state;
+
+       if (new_min_cdclk <= old_min_cdclk)
+               return 0;
+
+       cdclk_state = intel_atomic_get_cdclk_state(state);
+       if (IS_ERR(cdclk_state))
+               return PTR_ERR(cdclk_state);
+
+       old_min_cdclk = cdclk_state->bw_min_cdclk;
+
+       if (new_min_cdclk <= old_min_cdclk)
+               return 0;
+
+       *need_cdclk_calc = true;
+
+       drm_dbg_kms(display->drm,
+                   "bandwidth min cdclk: %d kHz -> %d kHz\n",
+                   old_min_cdclk, new_min_cdclk);
+
+       return 0;
+}
+
 static bool glk_cdclk_audio_wa_needed(struct intel_display *display,
                                      const struct intel_cdclk_state 
*cdclk_state)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h 
b/drivers/gpu/drm/i915/display/intel_cdclk.h
index cacee598af0e..0e67c75ca569 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -48,6 +48,9 @@ struct intel_cdclk_state *
 intel_atomic_get_cdclk_state(struct intel_atomic_state *state);
 void intel_cdclk_update_hw_state(struct intel_display *display);
 void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc);
+int intel_cdclk_update_bw_min_cdclk(struct intel_atomic_state *state,
+                                   int old_min_cdclk, int new_min_cdclk,
+                                   bool *need_cdclk_calc);
 
 #define to_intel_cdclk_state(global_state) \
        container_of_const((global_state), struct intel_cdclk_state, base)
-- 
2.49.1

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