Isolate the code that handles method selection and calculation, so skl_compute_plane_wm() doesn't get too long.
v2: - Rebased after moving the default case change to an earlier patch Signed-off-by: Luca Coelho <[email protected]> --- drivers/gpu/drm/i915/display/skl_watermark.c | 44 +++++++++++++------- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index a9d1bc432f75..4f9fd8c6ccb4 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -1790,25 +1790,14 @@ static bool xe3_auto_min_alloc_capable(struct intel_plane *plane, int level) return DISPLAY_VER(display) >= 30 && level == 0 && plane->id != PLANE_CURSOR; } -static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state, - struct intel_plane *plane, - int level, - unsigned int latency, - const struct skl_wm_params *wp, - const struct skl_wm_level *result_prev, - struct skl_wm_level *result /* out */) +static uint_fixed_16_16_t +skl_wm_run_method(struct intel_display *display, + const struct intel_crtc_state *crtc_state, + const struct skl_wm_params *wp, + unsigned int latency) { - struct intel_display *display = to_intel_display(crtc_state); uint_fixed_16_16_t method1, method2; uint_fixed_16_16_t selected_result; - u32 blocks, lines, min_ddb_alloc = 0; - - if (latency == 0 || - (use_minimal_wm0_only(crtc_state, plane) && level > 0)) { - /* reject it */ - result->min_ddb_alloc = U16_MAX; - return; - } method1 = skl_wm_method1(display, wp->plane_pixel_rate, wp->cpp, latency, wp->dbuf_block_size); @@ -1845,9 +1834,32 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state, selected_result = method1; } break; + } + + return selected_result; +} +static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state, + struct intel_plane *plane, + int level, + unsigned int latency, + const struct skl_wm_params *wp, + const struct skl_wm_level *result_prev, + struct skl_wm_level *result /* out */) +{ + struct intel_display *display = to_intel_display(crtc_state); + uint_fixed_16_16_t selected_result; + u32 blocks, lines, min_ddb_alloc = 0; + + if (latency == 0 || + (use_minimal_wm0_only(crtc_state, plane) && level > 0)) { + /* reject it */ + result->min_ddb_alloc = U16_MAX; + return; } + selected_result = skl_wm_run_method(display, crtc_state, wp, latency); + blocks = fixed16_to_u32_round_up(selected_result); if (DISPLAY_VER(display) < 30) blocks++; -- 2.51.0
