Hi Mika,
Thanks for the review.
On 10/28/2025 5:37 PM, Kahola, Mika wrote:
-----Original Message-----
From: Intel-xe <[email protected]> On Behalf Of Naladala
Ramanaidu
Sent: Friday, 17 October 2025 18.05
To: [email protected]; [email protected]
Cc: [email protected]; Nautiyal, Ankit K
<[email protected]>; Naladala, Ramanaidu
<[email protected]>
Subject: [PATCH v2] drm/i915: Add fallback for CDCLK selection when min_cdclk
is too high
In cases where the requested minimum CDCLK exceeds all available values for the
current reference clock, the CDCLK selection
logic previously returned 0. This could result coverity division or modulo by
zero issue.
This change introduces a fallback mechanism that returns the platform's
max_cdclk_freq instead of 0.
v2: Update safe fallback value to max cdclk.
Fixes: Coverity CID 2628056
We shouldn't mention the static analysis error ids as most of the audience
cannot trace it back.
With this change, this is
Sure. I will remove this Fixes tag while merging the patch.
Reviewed-by: Mika Kahola <[email protected]>
Signed-off-by: Naladala Ramanaidu <[email protected]>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index e92e7fd9fd13..da97c38cca14 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1561,7 +1561,7 @@ static int bxt_calc_cdclk(struct intel_display *display,
int min_cdclk)
drm_WARN(display->drm, 1,
"Cannot satisfy minimum cdclk %d with refclk %u\n",
min_cdclk, display->cdclk.hw.ref);
- return 0;
+ return display->cdclk.max_cdclk_freq;
}
static int bxt_calc_cdclk_pll_vco(struct intel_display *display, int cdclk)
--
2.43.0
