> Subject: [CI 01/32] drm/i915/display: Rename TBT functions to be ICL specific
> 
> Rename pll functions to include ICL platform as these are used from ICL
> onwards.
> 
> Signed-off-by: Mika Kahola <[email protected]>

LGTM,
Reviewed-by: Suraj Kandpal <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 30 +++++++++----------
>  1 file changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 8ea96cc524a1..303f03b420ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -3754,9 +3754,9 @@ static bool combo_pll_get_hw_state(struct
> intel_display *display,
>       return icl_pll_get_hw_state(display, pll, dpll_hw_state, enable_reg);  }
> 
> -static bool tbt_pll_get_hw_state(struct intel_display *display,
> -                              struct intel_dpll *pll,
> -                              struct intel_dpll_hw_state *dpll_hw_state)
> +static bool icl_tbt_pll_get_hw_state(struct intel_display *display,
> +                                  struct intel_dpll *pll,
> +                                  struct intel_dpll_hw_state *dpll_hw_state)
>  {
>       return icl_pll_get_hw_state(display, pll, dpll_hw_state,
> TBT_PLL_ENABLE);  } @@ -3985,9 +3985,9 @@ static void
> combo_pll_enable(struct intel_display *display,
>       /* DVFS post sequence would be here. See the comment above. */  }
> 
> -static void tbt_pll_enable(struct intel_display *display,
> -                        struct intel_dpll *pll,
> -                        const struct intel_dpll_hw_state *dpll_hw_state)
> +static void icl_tbt_pll_enable(struct intel_display *display,
> +                            struct intel_dpll *pll,
> +                            const struct intel_dpll_hw_state *dpll_hw_state)
>  {
>       const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> 
> @@ -4070,8 +4070,8 @@ static void combo_pll_disable(struct intel_display
> *display,
>       icl_pll_disable(display, pll, enable_reg);  }
> 
> -static void tbt_pll_disable(struct intel_display *display,
> -                         struct intel_dpll *pll)
> +static void icl_tbt_pll_disable(struct intel_display *display,
> +                             struct intel_dpll *pll)
>  {
>       icl_pll_disable(display, pll, TBT_PLL_ENABLE);  } @@ -4143,10
> +4143,10 @@ static const struct intel_dpll_funcs combo_pll_funcs = {
>       .get_freq = icl_ddi_combo_pll_get_freq,  };
> 
> -static const struct intel_dpll_funcs tbt_pll_funcs = {
> -     .enable = tbt_pll_enable,
> -     .disable = tbt_pll_disable,
> -     .get_hw_state = tbt_pll_get_hw_state,
> +static const struct intel_dpll_funcs icl_tbt_pll_funcs = {
> +     .enable = icl_tbt_pll_enable,
> +     .disable = icl_tbt_pll_disable,
> +     .get_hw_state = icl_tbt_pll_get_hw_state,
>       .get_freq = icl_ddi_tbt_pll_get_freq,
>  };
> 
> @@ -4160,7 +4160,7 @@ static const struct intel_dpll_funcs mg_pll_funcs = {
> static const struct dpll_info icl_plls[] = {
>       { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL0, },
>       { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL1, },
> -     { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id =
> DPLL_ID_ICL_TBTPLL,
> +     { .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id =
> +DPLL_ID_ICL_TBTPLL,
>         .is_alt_port_dpll = true, },
>       { .name = "MG PLL 1", .funcs = &mg_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL1, },
>       { .name = "MG PLL 2", .funcs = &mg_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL2, }, @@ -4208,7 +4208,7 @@ static const struct
> intel_dpll_funcs dkl_pll_funcs = {  static const struct dpll_info tgl_plls[] 
> = {
>       { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL0, },
>       { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL1, },
> -     { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id =
> DPLL_ID_ICL_TBTPLL,
> +     { .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id =
> +DPLL_ID_ICL_TBTPLL,
>         .is_alt_port_dpll = true, },
>       { .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL1, },
>       { .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL2, }, @@ -4286,7 +4286,7 @@ static const struct
> intel_dpll_mgr adls_pll_mgr = {  static const struct dpll_info adlp_plls[] = {
>       { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL0, },
>       { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id =
> DPLL_ID_ICL_DPLL1, },
> -     { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id =
> DPLL_ID_ICL_TBTPLL,
> +     { .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id =
> +DPLL_ID_ICL_TBTPLL,
>         .is_alt_port_dpll = true, },
>       { .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL1, },
>       { .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id =
> DPLL_ID_ICL_MGPLL2, },
> --
> 2.34.1

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