> Subject: [CI 28/32] drm/i915/display: PLL verify debug state print > > From: Imre Deak <[email protected]> > > Print out hw and sw pll states for better debugging support. > > Signed-off-by: Imre Deak <[email protected]> > Signed-off-by: Mika Kahola <[email protected]>
LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 17 ++++++++++++----- > 1 file changed, 12 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index 07bc99ae689c..6cc85a9a781f 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -4882,11 +4882,18 @@ verify_single_dpll_state(struct intel_display > *display, > "%s: pll enabled crtcs mismatch (expected > 0x%x in 0x%x)\n", > pll->info->name, pipe_mask, pll- > >state.pipe_mask); > > - INTEL_DISPLAY_STATE_WARN(display, > - pll->on && memcmp(&pll->state.hw_state, > &dpll_hw_state, > - sizeof(dpll_hw_state)), > - "%s: pll hw state mismatch\n", > - pll->info->name); > + if (INTEL_DISPLAY_STATE_WARN(display, > + pll->on && memcmp(&pll- > >state.hw_state, &dpll_hw_state, > + sizeof(dpll_hw_state)), > + "%s: pll hw state mismatch\n", > + pll->info->name)) { > + struct drm_printer p = drm_dbg_printer(display->drm, > DRM_UT_KMS, NULL); > + > + drm_printf(&p, "PLL %s HW state:\n", pll->info->name); > + intel_dpll_dump_hw_state(display, &p, &dpll_hw_state); > + drm_printf(&p, "PLL %s SW state:\n", pll->info->name); > + intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state); > + } > } > > static bool has_alt_port_dpll(const struct intel_dpll *old_pll, > -- > 2.34.1
