> -----Original Message-----
> From: Golani, Mitulkumar Ajitkumar <[email protected]>
> Sent: Tuesday, December 2, 2025 1:07 PM
> To: [email protected]
> Cc: [email protected]; Golani, Mitulkumar Ajitkumar
> <[email protected]>; Nautiyal, Ankit K
> <[email protected]>; [email protected]; Shankar, Uma
> <[email protected]>; Nikula, Jani <[email protected]>
> Subject: [PATCH v10 04/17] drm/i915/vrr: Add functions to read out vmin/vmax
> stuff
> 
> From: Ville Syrjälä <[email protected]>
> 
> Calculate delayed vblank start position with the help of added vmin/vmax 
> stuff for
> next frame and final computation.
> 
> --v2:
> - Correct Author details.
> 
> --v3:
> - Separate register details from this  patch.
> 
> --v4:
> - Add mask macros.
> 
> --v5:
> - As live prefix params indicate timings for current frame, read just _live 
> prefix
> values instead of next frame timings as done previously.
> - Squash Refactor vrr params patch.
> 
> --v6:
> - Use error code while returning invalid values. (Jani, Nikula)

Looks Good to me.
Reviewed-by: Uma Shankar <[email protected]>

> Signed-off-by: Ville Syrjälä <[email protected]>
> Signed-off-by: Mitul Golani <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_vrr.c | 56 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_vrr.h |  5 +++
>  2 files changed, 61 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index b92c42fde937..31f3a7b6e00d 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -261,6 +261,12 @@ static int intel_vrr_hw_value(const struct
> intel_crtc_state *crtc_state,
>               return value - crtc_state->set_context_latency;  }
> 
> +static int intel_vrr_vblank_start(const struct intel_crtc_state *crtc_state,
> +                               int vmin_vmax)
> +{
> +     return intel_vrr_hw_value(crtc_state, vmin_vmax) -
> +crtc_state->vrr.guardband; }
> +
>  /*
>   * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to
>   * Vtotal value.
> @@ -898,3 +904,53 @@ int intel_vrr_vmin_safe_window_end(const struct
> intel_crtc_state *crtc_state)
>       return intel_vrr_vmin_vblank_start(crtc_state) -
>              crtc_state->set_context_latency;  }
> +
> +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state
> +*crtc_state) {
> +     struct intel_display *display = to_intel_display(crtc_state);
> +     enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +     u32 tmp = 0;
> +
> +     tmp = intel_de_read(display,
> +TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_LIVE(cpu_transcoder));
> +
> +     if (REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_CNT_MASK, tmp) == 0)
> +             return -EINVAL;
> +
> +     return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_FLIPLINE(tmp)
> +
> +1); }
> +
> +int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state
> +*crtc_state) {
> +     struct intel_display *display = to_intel_display(crtc_state);
> +     enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +     u32 tmp = 0;
> +
> +     tmp = intel_de_read(display,
> +TRANS_VRR_DCB_ADJ_VMAX_CFG_LIVE(cpu_transcoder));
> +
> +     if (REG_FIELD_GET(VRR_DCB_ADJ_VMAX_CNT_MASK, tmp) == 0)
> +             return -EINVAL;
> +
> +     return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_VMAX(tmp) +
> 1);
> +}
> +
> +int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state
> +*crtc_state) {
> +     struct intel_display *display = to_intel_display(crtc_state);
> +     enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +     u32 tmp = 0;
> +
> +     tmp = intel_de_read(display,
> +TRANS_VRR_DCB_FLIPLINE_LIVE(cpu_transcoder));
> +
> +     return intel_vrr_vblank_start(crtc_state, VRR_DCB_FLIPLINE(tmp) + 1);
> +}
> +
> +int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state
> +*crtc_state) {
> +     struct intel_display *display = to_intel_display(crtc_state);
> +     enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +     u32 tmp = 0;
> +
> +     tmp = intel_de_read(display,
> TRANS_VRR_DCB_VMAX_LIVE(cpu_transcoder));
> +
> +     return intel_vrr_vblank_start(crtc_state, VRR_DCB_VMAX(tmp) + 1); }
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
> b/drivers/gpu/drm/i915/display/intel_vrr.h
> index bc9044621635..66fb9ad846f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -43,4 +43,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display
> *display);  int intel_vrr_safe_window_start(const struct intel_crtc_state
> *crtc_state);  int intel_vrr_vmin_safe_window_end(const struct 
> intel_crtc_state
> *crtc_state);
> 
> +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state
> +*crtc_state); int intel_vrr_dcb_vmax_vblank_start_next(const struct
> +intel_crtc_state *crtc_state); int
> +intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state
> +*crtc_state); int intel_vrr_dcb_vmax_vblank_start_final(const struct
> +intel_crtc_state *crtc_state);
> +
>  #endif /* __INTEL_VRR_H__ */
> --
> 2.48.1

Reply via email to