On Thu, 18 Dec 2025, Ankit Nautiyal <[email protected]> wrote: > Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and > INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions. > This lets GVT keep using existing register macros (e.g., > TRANSCONF(display, pipe)) while ensuring offset calculations happen > through functions instead of accessing display internals. > > Ideally, we would remove the display headers that define these macros, > but some macros in GVT still depend on them and have not yet been > ported. Keeping those headers leads to build conflicts, so as a > stopgap, we use temporary ifdef/undef blocks to override the macros > with API-backed versions. These will be removed once all dependent > macros are ported and the conflicting headers can be safely dropped. > > v2: > - Remove prefix `gvt/` while including the header file. (Jani) > - Explain the rationale behind temporary ifdef/undefs and plan to drop > them. (Jani). > > Signed-off-by: Ankit Nautiyal <[email protected]>
See my reply to the next patch, with that incorporated, Reviewed-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 + > drivers/gpu/drm/i915/gvt/display.c | 1 + > drivers/gpu/drm/i915/gvt/display_helpers.h | 35 ++++++++++++++++++++++ > drivers/gpu/drm/i915/gvt/fb_decoder.c | 1 + > drivers/gpu/drm/i915/gvt/handlers.c | 1 + > 5 files changed, 39 insertions(+) > create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h > > diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c > b/drivers/gpu/drm/i915/gvt/cmd_parser.c > index df04e4ead8ea..fbc8a5e28576 100644 > --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c > +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c > @@ -58,6 +58,7 @@ > #include "gem/i915_gem_context.h" > #include "gem/i915_gem_pm.h" > #include "gt/intel_context.h" > +#include "display_helpers.h" > > #define INVALID_OP (~0U) > > diff --git a/drivers/gpu/drm/i915/gvt/display.c > b/drivers/gpu/drm/i915/gvt/display.c > index 06517d1f07a2..9d6b22b2e4d0 100644 > --- a/drivers/gpu/drm/i915/gvt/display.c > +++ b/drivers/gpu/drm/i915/gvt/display.c > @@ -46,6 +46,7 @@ > #include "display/intel_cursor_regs.h" > #include "display/intel_display.h" > #include "display/intel_display_core.h" > +#include "display_helpers.h" > #include "display/intel_dpio_phy.h" > #include "display/intel_sprite_regs.h" > > diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h > b/drivers/gpu/drm/i915/gvt/display_helpers.h > new file mode 100644 > index 000000000000..97ebc92768fc > --- /dev/null > +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2025 Intel Corporation > + */ > + > +#ifndef __DISPLAY_HELPERS_H__ > +#define __DISPLAY_HELPERS_H__ > + > +#include "display/intel_gvt_api.h" > + > +#ifdef DISPLAY_MMIO_BASE > +#undef DISPLAY_MMIO_BASE > +#endif > +#define DISPLAY_MMIO_BASE(display) \ > + intel_display_device_mmio_base((display)) > + > +#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET > +#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET > +#endif > +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \ > + intel_display_device_pipe_offset((display), (pipe)) > + > +#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET > +#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET > +#endif > +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \ > + intel_display_device_trans_offset((display), (trans)) > + > +#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET > +#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET > +#endif > +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \ > + intel_display_device_cursor_offset((display), (pipe)) > + > +#endif /* __DISPLAY_HELPERS_H__ */ > diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c > b/drivers/gpu/drm/i915/gvt/fb_decoder.c > index a8079cfa8e1d..c402f3b5a0ab 100644 > --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c > +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c > @@ -46,6 +46,7 @@ > #include "display/intel_display_core.h" > #include "display/intel_sprite_regs.h" > #include "display/skl_universal_plane_regs.h" > +#include "display_helpers.h" > > #define PRIMARY_FORMAT_NUM 16 > struct pixel_format { > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c > b/drivers/gpu/drm/i915/gvt/handlers.c > index 36ea12ade849..9ada97d01b6c 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -66,6 +66,7 @@ > #include "display/vlv_dsi_pll_regs.h" > #include "gt/intel_gt_regs.h" > #include <linux/vmalloc.h> > +#include "display_helpers.h" > > /* XXX FIXME i915 has changed PP_XXX definition */ > #define PCH_PP_STATUS _MMIO(0xc7200) -- Jani Nikula, Intel
