> -----Original Message----- > From: Intel-xe <[email protected]> On Behalf Of Gustavo > Sousa > Sent: Wednesday, December 17, 2025 2:42 AM > To: [email protected]; [email protected] > Cc: Sousa, Gustavo <[email protected]> > Subject: [PATCH 2/2] drm/i915/cx0: Toggle powerdown states for C10 on > HDMI > > A new step has been added to Bspec with respect to the C10 PHY, which > instructs the driver to toggle powerdown value for boths PHY lanes to P0 and > then P2 when driving an HDMI connector. This update in the Bspec reflects > the changes required by Wa_14026084006, so document it. > > Note that, unlike other display workarounds, this one is actually tied to the > C10 PHY and not to a specific display IP. As such, let's just document it in > intel_cx0_phy.c instead of adding it to intel_display_wa.c. > > Bspec: 64568, 74489 > Signed-off-by: Gustavo Sousa <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 264f8a5072e5..2c87c58812da 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -3302,6 +3302,21 @@ static void intel_cx0pll_enable(struct > intel_encoder *encoder, > * Frequency Change. We handle this step in bxt_set_cdclk(). > */ > > + /* > + * 12. Toggle powerdown if HDMI is enabled on C10 PHY. > + * > + * Wa_13013502646: > + * Fixes: HDMI lane to lane skew violations on C10 display PHYs. > + * Workaround: Toggle powerdown value by setting first to P0 and > then to P2, for both > + * PHY lanes. > + */ > + if (!cx0pll_state_is_dp(pll_state) && pll_state->use_c10) { > + intel_cx0_powerdown_change_sequence(encoder, > INTEL_CX0_BOTH_LANES, > + XELPDP_P0_STATE_ACTIVE); > + intel_cx0_powerdown_change_sequence(encoder, > INTEL_CX0_BOTH_LANES, > + XELPDP_P2_STATE_READY); > + } > +
LGTM, Reviewed-by: Dnyaneshwar Bhadane <[email protected]> Dnyaneshwar, > intel_cx0_phy_transaction_end(encoder, wakeref); } > > > -- > 2.52.0
