On Fri, 16 Jan 2026, Michał Grzelak <[email protected]> wrote:
> While moving the code, should we rename val & val1 into val1 & val2 (or
> val2 & val1)? I think even renaming val -> val0 would suffice.

The variable naming matches the register macro naming. Historically,
there was only GEN6_PCODE_DATA, and GEN6_PCODE_DATA1 was added
afterwards. Hence val and val1.

Nowadays the spec has DATA0 and DATA1, so renaming both the register
macro and the variable to DATA0 and val0, respectively, would be fine.

Just not in this patch. Generally, only do one thing at a time.

> Or (if the comment is valid) should I send it as a separate patch?

The latter.

> Reviewed-by: Michał Grzelak <[email protected]>

Thanks,
Jani.


-- 
Jani Nikula, Intel

Reply via email to